From patchwork Fri Jan 10 09:19:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 13934075 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77DABE7719C for ; Fri, 10 Jan 2025 09:24:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=h6ab+x6Ynx/O74V+SfsXYwAL7nLhG88cwarhkjj6DpE=; b=JcMMMkCOKqBK+uMJRZBSugvRRw Yre1dtLgxqC4GqEQtx3+B/ql/VS2/fVIRi2B7i46LUJYdxwPjiT2PXKMJ1KsRxv+oQqXqAA/twwZk UeXqvIUCKJ8Gerbjyq9cdvbGkqfLEzGlutBGqiG28FuR4TSXTXb/Fs/SN7T0ham6B6qy2R9dHqpUE VkHpMooELqOFDgmnSnDrfLuhcLUlgrfHaCjhCgbdAADTyMa1Ukj4pYzET6p6ePtoQTCM/VGdt0jiq 5ov++9Juq4ght9OPuVr87z/QKa+8MhgF4RzsJGNKPGFAQ+0Ylxtdoq/Vi4GIANvkdiHBD0p7av3N+ GVxQeXJg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tWBFw-0000000EhGi-0Ssj; Fri, 10 Jan 2025 09:24:40 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tWBDS-0000000EgC4-3iUI for linux-arm-kernel@lists.infradead.org; Fri, 10 Jan 2025 09:22:08 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 50A8DlBH000357; Fri, 10 Jan 2025 10:21:58 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= h6ab+x6Ynx/O74V+SfsXYwAL7nLhG88cwarhkjj6DpE=; b=nDji/mW/AuPMid5J aoKDXsEF0VSGsNnbjL53ztfvRBa6mPsGcYdAqD2HQAqIg5yF47WOEszIV9k5RkT6 Y9Ou0mc7dpg4TUwSrM48ZW1evbpnw9+20HM/DmG3tNp0IsBpDdANURGgIbT8lduD 69zzx5Gl0EN1mSx49s1qmc/sOrJw4zrkBjFP559t3a89YzIpMmXhMJcV85bi7QPz pE8TcPH7wyQ1dJnIkHCgqyhF41F4WdKE+d8u5MfQdmzrDwZ6rTNzNss4uJ15qN8I ++du5Tr9GAWKKqnO3CCuVQNO7BCmdR4diVoOwDwrWM3joMzxk4WtGuYB9kVhsOzU pSefXg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 442q2dhyvd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Jan 2025 10:21:58 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D33AA40052; Fri, 10 Jan 2025 10:21:01 +0100 (CET) Received: from Webmail-eu.st.com (eqndag1node5.st.com [10.75.129.134]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1D50F28A669; Fri, 10 Jan 2025 10:20:02 +0100 (CET) Received: from SAFDAG1NODE1.st.com (10.75.90.17) by EQNDAG1NODE5.st.com (10.75.129.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Fri, 10 Jan 2025 10:20:01 +0100 Received: from localhost (10.252.28.64) by SAFDAG1NODE1.st.com (10.75.90.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Fri, 10 Jan 2025 10:20:01 +0100 From: Fabrice Gasnier To: , , CC: , , , , , , , , , , , , , , Subject: [PATCH v3 3/8] counter: stm32-timer-cnt: add support for stm32mp25 Date: Fri, 10 Jan 2025 10:19:17 +0100 Message-ID: <20250110091922.980627-4-fabrice.gasnier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250110091922.980627-1-fabrice.gasnier@foss.st.com> References: <20250110091922.980627-1-fabrice.gasnier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.252.28.64] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SAFDAG1NODE1.st.com (10.75.90.17) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250110_012207_214966_EB7FF0CA X-CRM114-Status: GOOD ( 13.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for STM32MP25 SoC. There are new counter modes that may be implemented in later. Still, use newly introduced compatible to handle this new HW variant and avoid being blocked with existing compatible in SoC dtsi file. Modes supported currently still remains compatible. New timer 20 has encoder capability, add it to the list. Acked-by: William Breathitt Gray Signed-off-by: Fabrice Gasnier --- drivers/counter/stm32-timer-cnt.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c index e75b69476a00..3d3384cbea87 100644 --- a/drivers/counter/stm32-timer-cnt.c +++ b/drivers/counter/stm32-timer-cnt.c @@ -669,12 +669,14 @@ static void stm32_timer_cnt_detect_channels(struct device *dev, dev_dbg(dev, "has %d cc channels\n", priv->nchannels); } -/* encoder supported on TIM1 TIM2 TIM3 TIM4 TIM5 TIM8 */ -#define STM32_TIM_ENCODER_SUPPORTED (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(7)) +/* encoder supported on TIM1 TIM2 TIM3 TIM4 TIM5 TIM8 TIM20 */ +#define STM32_TIM_ENCODER_SUPPORTED (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(7) | \ + BIT(19)) static const char * const stm32_timer_trigger_compat[] = { "st,stm32-timer-trigger", "st,stm32h7-timer-trigger", + "st,stm32mp25-timer-trigger", }; static int stm32_timer_cnt_probe_encoder(struct device *dev, @@ -846,6 +848,7 @@ static SIMPLE_DEV_PM_OPS(stm32_timer_cnt_pm_ops, stm32_timer_cnt_suspend, static const struct of_device_id stm32_timer_cnt_of_match[] = { { .compatible = "st,stm32-timer-counter", }, + { .compatible = "st,stm32mp25-timer-counter", }, {}, }; MODULE_DEVICE_TABLE(of, stm32_timer_cnt_of_match);