From patchwork Wed Jan 15 09:21:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Bruel X-Patchwork-Id: 13940164 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 90227C02180 for ; Wed, 15 Jan 2025 09:35:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=reF3mDkiKmVEX2bXYi+cTFdJ9WH+4R33Xx0dlZMnTAY=; b=TJIXpTXlTTzBvfQt4R34zPIW7J EOA/Ajb6v8qnAhHG6x8/vxyqIg/NkgxsbopKV3kFOui3EQS54pwHK6eRSVLUtFZzc7j7Hnc21kdmi yIan69LzOOyTWbAHjw9naZxZPa21clQiugvPG57mPsl62mjW75bJZzDVTm38UcKSSg8GbjPRSEa9Q QPH/oyKrEqpoXvE42j6SABalwVy/98uF81IedwWb70MG/HWoI22ys5FK2q1aKgsYJVd4yC3KbB000 qmnZlQSW3zQD1wmnyaOv8CEtg/9J6ECAkuFz/KDurlndnS6kxycvhCCnKV0l7lX3SUu5ExzOR9fJj arOXBl2Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tXzoJ-0000000BMOO-45d9; Wed, 15 Jan 2025 09:35:39 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tXzfY-0000000BJTS-3yfs for linux-arm-kernel@lists.infradead.org; Wed, 15 Jan 2025 09:26:38 +0000 Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 50F5MRD5014666; Wed, 15 Jan 2025 10:26:25 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= reF3mDkiKmVEX2bXYi+cTFdJ9WH+4R33Xx0dlZMnTAY=; b=s5tXq0miPRIX0Y4c 6ao6dTn2h8s2iwj/A91DOgYSLnzAc2p2gwMjMu86i+gcC1P+nMWvq1hyqXvUxsCE /CzeI0kMxtlf6hTbPgR4fD5jlS7Cw8KoWneFttBy9WW1RwUMSjirSk/7N7VRNo8L 1ZUomUPogV+Rws7szcf50Y6YCTRxKFxpOXgqsEr26UZ/8a/ZoF2gkU0eOATJrgH8 WOm/G+JgxfaWImVb+lGDaVsHmKajc3c/cjByUK7hLrQang4bhbDwejn+2xxKjHOA 0rChMHx9rzhvnOldKHXiI06E2rcl9YgqViNH/9IW0PWrEcbb5K/yVcOI60SJbbM1 OSCkuw== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 4466tjrxrq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Jan 2025 10:26:25 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 9AAED4005B; Wed, 15 Jan 2025 10:24:58 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D3FF8246990; Wed, 15 Jan 2025 10:23:45 +0100 (CET) Received: from localhost (10.129.178.212) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 15 Jan 2025 10:23:45 +0100 From: Christian Bruel To: , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v3 09/10] arm64: dts: st: Enable PCIe on the stm32mp257f-ev1 board Date: Wed, 15 Jan 2025 10:21:33 +0100 Message-ID: <20250115092134.2904773-10-christian.bruel@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250115092134.2904773-1-christian.bruel@foss.st.com> References: <20250115092134.2904773-1-christian.bruel@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.129.178.212] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-15_03,2025-01-15_02,2024-11-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250115_012637_272586_D51B8891 X-CRM114-Status: UNSURE ( 9.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PCIe RC and EP support on stm32mp257f-ev1 board, and enable RC mode by default. Signed-off-by: Christian Bruel --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 1b88485a62a1..f49daa362ebb 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -225,6 +225,24 @@ scmi_vdd_sdcard: regulator@23 { }; }; +&pcie_ep { + pinctrl-names = "default", "init"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + status = "disabled"; +}; + +&pcie_rc { + pinctrl-names = "default", "init", "sleep"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + pinctrl-2 = <&pcie_sleep_pins_a>; + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + status = "okay"; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a>;