From patchwork Tue Jan 21 15:08:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13946420 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9EB4C0218B for ; Tue, 21 Jan 2025 15:15:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:MIME-Version:Cc:To: In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type: Subject:Date:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=j9edP/JrVA+yShP9vIcD/4dxX5YBpcITjaG+fntkc3k=; b=vD0NVFj6TET3IRV7Ye5xPC1ajJ aMji5Ssc0mNfhNbqix+xkJwQMa5/Zwprsyl/RE1nhOCwc/WXZiQMH7NFzHVOVGwqcmnpgeqhJyfpA plRFpHgVcbkIg8EC3KGhUuEPFgdYQ3b/WlDNY80MaNCFhAumT4lq73e3nv0CbmwM3vIviMv01fZ+8 M50MLSXfPzzIRYEGCs86V48gZiMiLTSxH9LTlnX6s+BT5qVFmUchMtIDAbLamMbTJD6nyUA7Fmhw3 JxKmE/L12wUgdU6PcNuI8FigPy1W5o6hIHOF9uE/kkOEPrrfawJA4tELGmC6zg4TIBHclN2f/nw3c c80iT70w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1taFyb-00000008Bfm-0NBV; Tue, 21 Jan 2025 15:15:37 +0000 Received: from mail-db5eur02on20614.outbound.protection.outlook.com ([2a01:111:f403:2608::614] helo=EUR02-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1taFsH-00000008Aom-187b for linux-arm-kernel@lists.infradead.org; Tue, 21 Jan 2025 15:09:06 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=DCpHkrH32LrC06CwLFg8YjoKj9OQ85GyqhESVQ2uAaVF+HHmRc+5dltBnEEd+XI53ui1ynCc2rJBIj0QWsHzmRNrzGZQGgNEH9XPIrGSSELpKsihP2d3GMOSAQJE8+RQbPtV6v/Dk10rcLjSHWe6VPq3RkmzQv6e/Y2AdNDQmXNYyJ75EbMfyw2mEoRVTQiI1qrzHJy0Nuc7Ch+5N0CRHy3gXLZh27cODZyHX/H9p+f6X58v/Bsgz7zUgeExyQTlZDum7VQ02URVunPfdM4d37e9eN56xb0rSzh9s2rot30VGxkvlg/sb2HGR5rn43I7Zoo/7QqNGpdDca+9Bghbbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=j9edP/JrVA+yShP9vIcD/4dxX5YBpcITjaG+fntkc3k=; b=IHGh632A/7+2zjpRHbugKHqNoqlm22SVyfMDwcPeTGoP5FCiBle2IgF5J+UsDbGiNnY47ZYZgjSjmZW7ObDdFjHFpBIUnUynPu38MtAl0TG06+/f5buO4FjCdH6MvDOFOKHJ7CDBq9da3qI3TYD6VUthx5vQeDMYELsrKYvJw21Xlie8G3OgXoo7RamdO+hwUhqyrsGBmgv7O45OdZffbTbA41I2xQ408UK5E/TvN4a34ZPlhSeDaCuKNXTkeZFZHSKXTsHSuckXZ8Arwq/2Wr/gCK/yRr/JbxCHanAKiYH6gR81TTHsMQVtWnaTe7oTxc5IKT9umcs2iI9zleLFKA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=j9edP/JrVA+yShP9vIcD/4dxX5YBpcITjaG+fntkc3k=; b=fdVSprAU4Wjv53nySBdTQ6Y5sPqXuBrBDckfB8VTT0/yLjrLnczvuq6vMYc2iqlL+RjKZ3qD938Z1hCJc33Xw1HNZuCnis0HjipFje5nYG2o/mmE6QSrFkxf34vFHBmf0pcdWsdB36RlSrN6fGpJvLYklSGyhJg+TT+5KhqRo5BEaCptatV7JB/DcPQq9mk3x8aqu9MDYa+HjUEO0SAj8ECifPxBvrVA93Zs87Hfx11J012x8zG82N6UjK4X8+ziAuIqmbjZ7L2slcfJkAAHuVxkL9Uhbc6QG6TwyuFLrmBr2arbIrncBFxS9NzHunRavC2YRPf4EYIefxfA9LgTKg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from PAXPR04MB8459.eurprd04.prod.outlook.com (2603:10a6:102:1da::15) by AM7PR04MB6853.eurprd04.prod.outlook.com (2603:10a6:20b:107::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8356.22; Tue, 21 Jan 2025 15:09:02 +0000 Received: from PAXPR04MB8459.eurprd04.prod.outlook.com ([fe80::165a:30a2:5835:9630]) by PAXPR04MB8459.eurprd04.prod.outlook.com ([fe80::165a:30a2:5835:9630%5]) with mapi id 15.20.8356.020; Tue, 21 Jan 2025 15:09:01 +0000 From: "Peng Fan (OSS)" Date: Tue, 21 Jan 2025 23:08:12 +0800 Subject: [PATCH 2/5] firmware: arm_scmi: imx: Add i.MX95 CPU Protocol Message-Id: <20250121-imx-lmm-cpu-v1-2-0eab7e073e4e@nxp.com> References: <20250121-imx-lmm-cpu-v1-0-0eab7e073e4e@nxp.com> In-Reply-To: <20250121-imx-lmm-cpu-v1-0-0eab7e073e4e@nxp.com> To: Sudeep Holla , Cristian Marussi , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-kernel@vger.kernel.org, arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, Peng Fan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1737472103; l=10603; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=Kis3sr9W8URwEQj+n9s61NGQaShBcfjbC/o6ISml5Ds=; b=0RveYEMSiCz43jRP4XSO+cZeHzNmT7xTzkLXccuSQQpRF2zBy13Y+D5onQbR0X+N+OI11jZGr jsdap3xQyB5CRLZ0yCpARrEMhA5rZxvazsEwvypALQM6NN6Ll1GXheK X-Developer-Key: i=peng.fan@nxp.com; a=ed25519; pk=I4sJg7atIT1g63H7bb5lDRGR2gJW14RKDD0wFL8TT1g= X-ClientProxiedBy: SI2PR01CA0045.apcprd01.prod.exchangelabs.com (2603:1096:4:193::19) To PAXPR04MB8459.eurprd04.prod.outlook.com (2603:10a6:102:1da::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB8459:EE_|AM7PR04MB6853:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e16932c-5d3e-4282-b756-08dd3a2d89e4 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|376014|52116014|7416014|1800799024|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?q?TqkHnuzKlQ3Ztc4pfhtu7mFtntX6w1g?= =?utf-8?q?GLgTXGWtDAvEtWPuGuWuMp91Bmvm4I0/ikllkAn5j02JlpNnvBmTTe14DZjlbdlxz?= =?utf-8?q?U75+5XZsbO0y9/g6+grpz9FnripdpmxB3miI9CkpO6Ack7qsbnMVMnYZAAs39CSKy?= =?utf-8?q?7Zsg5/p6azzZNdArUXc81VtHUvRWPA+T/r98PLTqy9FwT339Ldjg3DreWv+FJKoUV?= =?utf-8?q?0XBCW2j+rmEGkreR32O1qwKlIz6WGjSbI5xJsioXmXHCcXG3tA3wiJmHHy1gSLeax?= =?utf-8?q?8tdtNnayF9bTI2v5/pYmupwLrCCCKpGcgvu9cnPu7iU6zX57UfuyH6ljnfEHban5C?= =?utf-8?q?Gyg1fu/tm4pWcUp2O771jBH6byv6Kp0s2HVP4sjr+OZMz9BXm9sB5cyShiqaSpg1Z?= =?utf-8?q?186p9FjXknAExhF0TbQ540Y2gId9gMnfxSXVKFveGsiR9ikWFCEdzU/Y9FWdNzhWa?= =?utf-8?q?OmYqldiI1aR9NzmR0osxfQaqihTNQJoc8ROlWf3HsuK9tOwBUskDoghDBnrNxkh0L?= =?utf-8?q?KLaYmZn9W5Kez1g1wfBmxLlYgG5gnK8K9ZDsKHEaFtv2wdd8x5r5QZ4hJ6xOE5fFL?= =?utf-8?q?UJydq29jeWTCuCTXucwX5/3MeSwQ4TyEzrcFptiM6kzDm7B2PT/P9QaNhF51tBdoc?= =?utf-8?q?4YgHTvPYVaeDZNMrTRuKIBA4ZypSrA3bbDGAGVhCGgZPsSYLiB/UpmKK3KLHlvjSM?= =?utf-8?q?Td9vRNGZ9/ygaLh4/B1G4kLM6UydboJMrkWaEM70+dWIMZYevp7mwufE+FcVhGUss?= =?utf-8?q?FlavKNCEpjXLz/iE7KKyLAWgJbsyUtAcigRIBs3YwoBHTfRAtZCfm+nJvvErhvZb/?= =?utf-8?q?esZy91XqZT6cCTvZgr4rU8UkOu4taVC9xY51q2IzBjAFCNpbwxOTg93oa3eTKUTv1?= =?utf-8?q?euclbTaxmwlSrrCXnV1Li4SvyNDa3e7RIix5JVIWVK09rxje2x0QtN9tuyr0mcFtb?= =?utf-8?q?OOb3KCzBVu2ir4DfR2cGfuAt07YWoRUAxGD2/yUo7lXfI9JYUY+jb2aVB/mJ0L+Qt?= =?utf-8?q?74HcYhY8zZj/c+nkogX01EiaWg195DcvxCHk08vPKD7z9zPocs73KsDEu/o7b69qi?= =?utf-8?q?wpN4y8O872GbFR3+8ZuJsgp4B7ACT3PymEuB4Vgz2kXwa+wcGxkv99qfh5ohNPtME?= =?utf-8?q?qjPBWFHP6NPANJNLZ0OWtm/TU/N1rHhFq8+8UJKpAkkK8ZYMD9ZrTnmeh/gHMYRQa?= =?utf-8?q?oiSGLSAwVbEJRCkVKJysU1YAppLgk3j8cIZirY7QuODGCEAYyDmjB7bc8l/vZo+y5?= =?utf-8?q?+3scDMgPYQs7oTTzeQSJV1taLMwwM70VOPYyC3DKFoac4t6MIYLiah7Dy6uZg/nSk?= =?utf-8?q?k7R0P0q4IeEhQ6M2ymsyurNhDcCN9L3r/kA7+hD+bevk++Rtwpa6MOqCukqHEmxdk?= =?utf-8?q?WwS+r42Cbcv?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAXPR04MB8459.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(376014)(52116014)(7416014)(1800799024)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?ydsVhKTfOTChD3sSYMFjJwFv5zgd?= =?utf-8?q?uYgOCcLO31kvqtCp/jPHx8ZBdIsq/K6IkLu0loHIKdBX7ZovmSUev53iF9Xsh7nna?= =?utf-8?q?zy4aIWZQfoRcALdJNSP9OSw5t+X0QzyP8nQ5cmN+18f1yLwpxK9qJCUGjq4VdZF9Q?= =?utf-8?q?WHE0i1QtHxErTXbb2Q/SDr3NLSM88r3UqRYASE1t3UVxeIKnOUOCLqgOjkuwoJ7o9?= =?utf-8?q?HyPD6Hr6HAxwFQ+NjtUQ1Dw46omV2rgDPYP6yJ3wzv8Sw1L2uGUHTblu31JV8V/oW?= =?utf-8?q?eud9jEUBfdrOk4wipZeHTq3hLzY5jgJWO2GyGAWWVEoG0BWlJgdcILdwCeA+zBEOe?= =?utf-8?q?LeevCkjlkT3iRmurDGvfNzmGgZMnjhLN3b92bfF9fRednCU649f14+twjF+3IBwvP?= =?utf-8?q?n+5xjY7kkibAOMV8yS2YWCVY3go3EYRuCafVSaiZhNE42a9Avr1p1tkwPI/31QKoQ?= =?utf-8?q?2Cvc8KC/KCXzmTgUfyEegUJjCvbzU0ejMXAtCqFDJ7znbetuGeWe0EfiW5w0O2kWQ?= =?utf-8?q?i2EUJUNNN7lNlRQecobb9h1t0iHNqEPYixzSqtdxXO8l33eJd/FlFvgPHh35puUsw?= =?utf-8?q?4yyF1+uv+G6zbNMAs4lKLV720E/7bcqsG9YxvgtqUL1BxiToc+1T5WL+r6b6kDQhB?= =?utf-8?q?P/7/IT+oef2493Hz/mF4EV9R4UKYoVO2o2z7AzVctJpeYAcPGjLmKJXKRrgpv5Y+/?= =?utf-8?q?RvK+RjzItRXwwkYc9vlw0sCrCPSdtiU9MJMDAljLP1DAN2Ebx5LrWgRYLM4DNhfC1?= =?utf-8?q?3RZbU/X00mviIGm3sqOMKl/XE3ZywJe1lZ9AP5Uv636wIbMVwjgBr/kZJGMIFpApV?= =?utf-8?q?AIOdnpQdFMBhWrWemQe7pwUVzuu/HE2QJQMN6l+Z7RmSi1UFAKGAWspBeAaFQcLLC?= =?utf-8?q?Q67fz9bRVj9jjqtZHCB2YENhwW2Q8rgiPYyuWvnj8CVnMtZzYBXjfEldQ87YEK7oO?= =?utf-8?q?3futpLoucbXqYKbzVyCpKnzVXcm6g3hD5lTZN3pjIPKY1oUHDGyQt6N3BZB5Kv7P8?= =?utf-8?q?JHVFgvcsTZojk63AZKbLFZP5vkFmU968OiJH6E48i80dyVsjgiCbGF94HLSZSTeIW?= =?utf-8?q?+6O0tdYZG2i/d5fIPwroI16wf4bsge4/rtLezKPayVXEsdApmGSQnBuukzdNZydct?= =?utf-8?q?0DfJyQEwd7FWr+plaa94Hc8XlnV5yy/lt9nGapuHObRfon7jRpG6OTfPtFmSwfnQ+?= =?utf-8?q?gMNq4SZWL3IAsdvtuHh1zNGLsCf+OzDx12dhwXalfDYy2hF/lEPnHmrBwdxmzLCRS?= =?utf-8?q?Q7V34cY2dQv5xbJT7iGFzHbZ23fw0PaMMf/K6615sdsF+K2la7ERtO/Gi4R7JloLv?= =?utf-8?q?hsYxKcYrGvdBV41d7NCaihTctJErpUENOvx41YIvtE2fZSVAecE/LnLGnh4j6YQvK?= =?utf-8?q?y9Ia9GogzXMpYbIsxPXEk9Gw4B1+x3RCIYjM/WX6KRF/rEWI6ozrt6lTZtZg2IubD?= =?utf-8?q?+EXVd0K/UJ2rkBcsIhq3jXZrSHPE+wAfHGG7TySM6uFw6LOeNxUpixZ+pV/cfD4nJ?= =?utf-8?q?uOzHcPCU1Ond?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9e16932c-5d3e-4282-b756-08dd3a2d89e4 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB8459.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jan 2025 15:09:01.8875 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ob8P+nQMbJeelvRTW4OGqbOZ8CG10iPu0xBbWE9z7xLXnPKfunUvXxZeH+2icoCLZvrAamHli3rmm7h3CgWrpg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR04MB6853 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250121_070905_462183_E77BBFA4 X-CRM114-Status: GOOD ( 17.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Peng Fan This protocol allows an agent to start, stop a CPU or set reset vector. It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an AP cluster). Signed-off-by: Peng Fan --- drivers/firmware/arm_scmi/vendors/imx/Kconfig | 13 +- drivers/firmware/arm_scmi/vendors/imx/Makefile | 1 + drivers/firmware/arm_scmi/vendors/imx/imx-sm-cpu.c | 283 +++++++++++++++++++++ include/linux/scmi_imx_protocol.h | 10 + 4 files changed, 306 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/arm_scmi/vendors/imx/Kconfig b/drivers/firmware/arm_scmi/vendors/imx/Kconfig index 1a936fc87d2350e2a21bccd45dfbeebfa3b90286..9070522510e4d3f3d7276a7581f8676006d20f90 100644 --- a/drivers/firmware/arm_scmi/vendors/imx/Kconfig +++ b/drivers/firmware/arm_scmi/vendors/imx/Kconfig @@ -12,6 +12,17 @@ config IMX_SCMI_BBM_EXT To compile this driver as a module, choose M here: the module will be called imx-sm-bbm. +config IMX_SCMI_CPU_EXT + tristate "i.MX SCMI CPU EXTENSION" + depends on ARM_SCMI_PROTOCOL || (COMPILE_TEST && OF) + default y if ARCH_MXC + help + This enables i.MX System CPU Protocol to manage cpu + start, stop and etc. + + To compile this driver as a module, choose M here: the + module will be called imx-sm-cpu. + config IMX_SCMI_LMM_EXT tristate "i.MX SCMI LMM EXTENSION" depends on ARM_SCMI_PROTOCOL || (COMPILE_TEST && OF) @@ -21,7 +32,7 @@ config IMX_SCMI_LMM_EXT manage Logical Machines boot, shutdown and etc. To compile this driver as a module, choose M here: the - module will be called imx-sm-lmm. + module will be called imx-sm-cpu. config IMX_SCMI_MISC_EXT tristate "i.MX SCMI MISC EXTENSION" diff --git a/drivers/firmware/arm_scmi/vendors/imx/Makefile b/drivers/firmware/arm_scmi/vendors/imx/Makefile index f39a99ccaf9af757475e8b112d224669444d7ddc..e3a5ea46345c89da1afae25e55698044672b7c28 100644 --- a/drivers/firmware/arm_scmi/vendors/imx/Makefile +++ b/drivers/firmware/arm_scmi/vendors/imx/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_IMX_SCMI_BBM_EXT) += imx-sm-bbm.o +obj-$(CONFIG_IMX_SCMI_CPU_EXT) += imx-sm-cpu.o obj-$(CONFIG_IMX_SCMI_LMM_EXT) += imx-sm-lmm.o obj-$(CONFIG_IMX_SCMI_MISC_EXT) += imx-sm-misc.o diff --git a/drivers/firmware/arm_scmi/vendors/imx/imx-sm-cpu.c b/drivers/firmware/arm_scmi/vendors/imx/imx-sm-cpu.c new file mode 100644 index 0000000000000000000000000000000000000000..e3f294c2cb69a5b5a916d55984f4a63539937d02 --- /dev/null +++ b/drivers/firmware/arm_scmi/vendors/imx/imx-sm-cpu.c @@ -0,0 +1,283 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * System control and Management Interface (SCMI) NXP CPU Protocol + * + * Copyright 2025 NXP + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "../../protocols.h" +#include "../../notify.h" + +#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x10000 + +enum scmi_imx_cpu_protocol_cmd { + SCMI_IMX_CPU_ATTRIBUTES = 0x3, + SCMI_IMX_CPU_START = 0x4, + SCMI_IMX_CPU_STOP = 0x5, + SCMI_IMX_CPU_RESET_VECTOR_SET = 0x6, + SCMI_IMX_CPU_INFO_GET = 0xC, +}; + +struct scmi_imx_cpu_info { + u32 nr_cpu; +}; + +#define SCMI_IMX_CPU_PROTO_ATTR_NUM_CPUS(x) ((x) & 0xFFFF) +struct scmi_msg_imx_cpu_protocol_attributes { + __le32 attributes; +}; + +struct scmi_msg_imx_cpu_attributes_out { + __le32 attributes; +#define CPU_MAX_NAME 16 + u8 name[CPU_MAX_NAME]; +}; + +struct scmi_imx_cpu_reset_vector_set_in { + __le32 cpuid; +#define CPU_VEC_FLAGS_RESUME BIT(31) +#define CPU_VEC_FLAGS_START BIT(30) +#define CPU_VEC_FLAGS_BOOT BIT(29) + __le32 flags; + __le32 resetvectorlow; + __le32 resetvectorhigh; +}; + +struct scmi_imx_cpu_info_get_out { +#define CPU_RUN_MODE_START 0 +#define CPU_RUN_MODE_HOLD 1 +#define CPU_RUN_MODE_STOP 2 +#define CPU_RUN_MODE_SLEEP 3 + __le32 runmode; + __le32 sleepmode; + __le32 resetvectorlow; + __le32 resetvectorhigh; +}; + +static int scmi_imx_cpu_validate_cpuid(const struct scmi_protocol_handle *ph, + u32 cpuid) +{ + struct scmi_imx_cpu_info *info = ph->get_priv(ph); + + if (cpuid >= info->nr_cpu) + return -EINVAL; + + return 0; +} + +static int scmi_imx_cpu_start(const struct scmi_protocol_handle *ph, u32 cpuid) +{ + struct scmi_xfer *t; + int ret; + + ret = scmi_imx_cpu_validate_cpuid(ph, cpuid); + if (ret) + return ret; + + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_START, sizeof(u32), + 0, &t); + if (ret) + return ret; + + put_unaligned_le32(cpuid, t->tx.buf); + ret = ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_stop(const struct scmi_protocol_handle *ph, u32 cpuid) +{ + struct scmi_xfer *t; + int ret; + + ret = scmi_imx_cpu_validate_cpuid(ph, cpuid); + if (ret) + return ret; + + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_STOP, sizeof(u32), + 0, &t); + if (ret) + return ret; + + put_unaligned_le32(cpuid, t->tx.buf); + ret = ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_reset_vector_set(const struct scmi_protocol_handle *ph, + u32 cpuid, u64 vector, bool start, + bool boot, bool resume) +{ + struct scmi_imx_cpu_reset_vector_set_in *in; + struct scmi_xfer *t; + int ret; + + ret = scmi_imx_cpu_validate_cpuid(ph, cpuid); + if (ret) + return ret; + + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_RESET_VECTOR_SET, sizeof(*in), + 0, &t); + if (ret) + return ret; + + in = t->tx.buf; + in->cpuid = cpu_to_le32(cpuid); + in->flags = start ? CPU_VEC_FLAGS_START : 0; + in->flags |= boot ? CPU_VEC_FLAGS_BOOT : 0; + in->flags |= resume ? CPU_VEC_FLAGS_BOOT : 0; + in->resetvectorlow = cpu_to_le32(lower_32_bits(vector)); + in->resetvectorhigh = cpu_to_le32(upper_32_bits(vector)); + ret = ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_started(const struct scmi_protocol_handle *ph, u32 cpuid, + bool *started) +{ + struct scmi_imx_cpu_info_get_out *out; + struct scmi_xfer *t; + int ret; + + *started = false; + ret = scmi_imx_cpu_validate_cpuid(ph, cpuid); + if (ret) + return ret; + + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_INFO_GET, sizeof(u32), + 0, &t); + if (ret) + return ret; + + put_unaligned_le32(cpuid, t->tx.buf); + ret = ph->xops->do_xfer(ph, t); + if (!ret) { + out = t->rx.buf; + if ((out->runmode == CPU_RUN_MODE_START) || + (out->runmode == CPU_RUN_MODE_SLEEP)) + *started = true; + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static const struct scmi_imx_cpu_proto_ops scmi_imx_cpu_proto_ops = { + .cpu_reset_vector_set = scmi_imx_cpu_reset_vector_set, + .cpu_start = scmi_imx_cpu_start, + .cpu_started = scmi_imx_cpu_started, + .cpu_stop = scmi_imx_cpu_stop, +}; + +static int scmi_imx_cpu_protocol_attributes_get(const struct scmi_protocol_handle *ph, + struct scmi_imx_cpu_info *info) +{ + struct scmi_msg_imx_cpu_protocol_attributes *attr; + struct scmi_xfer *t; + int ret; + + ret = ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0, + sizeof(*attr), &t); + if (ret) + return ret; + + attr = t->rx.buf; + + ret = ph->xops->do_xfer(ph, t); + if (!ret) { + info->nr_cpu = SCMI_IMX_CPU_PROTO_ATTR_NUM_CPUS(attr->attributes); + dev_info(ph->dev, "i.MX SM CPU: %d cpus\n", + info->nr_cpu); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_imx_cpu_attributes_get(const struct scmi_protocol_handle *ph, + u32 cpuid, struct scmi_imx_cpu_info *info) +{ + struct scmi_msg_imx_cpu_attributes_out *out; + struct scmi_xfer *t; + int ret; + + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_CPU_ATTRIBUTES, sizeof(u32), 0, &t); + if (ret) + return ret; + + put_unaligned_le32(cpuid, t->tx.buf); + ret = ph->xops->do_xfer(ph, t); + if (!ret) { + out = t->rx.buf; + dev_info(ph->dev, "i.MX CPU: name: %s\n", out->name); + } else { + dev_err(ph->dev, "i.MX cpu: Failed to get info of cpu(%u)\n", cpuid); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + + +static int scmi_imx_cpu_protocol_init(const struct scmi_protocol_handle *ph) +{ + struct scmi_imx_cpu_info *info; + u32 version; + int ret, i; + + ret = ph->xops->version_get(ph, &version); + if (ret) + return ret; + + dev_info(ph->dev, "NXP SM CPU Protocol Version %d.%d\n", + PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); + + info = devm_kzalloc(ph->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + ret = scmi_imx_cpu_protocol_attributes_get(ph, info); + if (ret) + return ret; + + for (i = 0; i < info->nr_cpu; i++) { + ret = scmi_imx_cpu_attributes_get(ph, i, info); + if (ret) + return ret; + } + + return ph->set_priv(ph, info, version); +} + +static const struct scmi_protocol scmi_imx_cpu = { + .id = SCMI_PROTOCOL_IMX_CPU, + .owner = THIS_MODULE, + .instance_init = &scmi_imx_cpu_protocol_init, + .ops = &scmi_imx_cpu_proto_ops, + .supported_version = SCMI_PROTOCOL_SUPPORTED_VERSION, + .vendor_id = SCMI_IMX_VENDOR, + .sub_vendor_id = SCMI_IMX_SUBVENDOR, +}; +module_scmi_protocol(scmi_imx_cpu); + +MODULE_DESCRIPTION("i.MX SCMI CPU driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/scmi_imx_protocol.h b/include/linux/scmi_imx_protocol.h index 456559f021696ae51f40ed11e6f85089d430ce71..6521199cdab67c7e751e850def221d89898cd0f2 100644 --- a/include/linux/scmi_imx_protocol.h +++ b/include/linux/scmi_imx_protocol.h @@ -16,6 +16,7 @@ #define SCMI_PROTOCOL_IMX_LMM 0x80 #define SCMI_PROTOCOL_IMX_BBM 0x81 +#define SCMI_PROTOCOL_IMX_CPU 0x82 #define SCMI_PROTOCOL_IMX_MISC 0x84 #define SCMI_IMX_VENDOR "NXP" @@ -86,4 +87,13 @@ struct scmi_imx_lmm_proto_ops { u32 flags); }; +struct scmi_imx_cpu_proto_ops { + int (*cpu_reset_vector_set)(const struct scmi_protocol_handle *ph, + u32 cpuid, u64 vector, bool start, + bool boot, bool resume); + int (*cpu_start)(const struct scmi_protocol_handle *ph, u32 cpuid); + int (*cpu_started)(const struct scmi_protocol_handle *ph, u32 cpuid, + bool *started); + int (*cpu_stop)(const struct scmi_protocol_handle *ph, u32 cpuid); +}; #endif