| Message ID | 20250122141037.953934-2-patrice.chotard@foss.st.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add STM32MP25 SPI NOR support | expand |
On 22/01/2025 15:10, patrice.chotard@foss.st.com wrote: > --- > .../bindings/spi/st,stm32-ospi.yaml | 109 ++++++++++++++++++ > 1 file changed, 109 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/st,stm32-ospi.yaml > > diff --git a/Documentation/devicetree/bindings/spi/st,stm32-ospi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-ospi.yaml > new file mode 100644 > index 000000000000..bf16252f85fa > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/st,stm32-ospi.yaml Use compatible as filename. > @@ -0,0 +1,109 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/st,stm32-ospi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STMicroelectronics STM32 Octal Serial Peripheral Interface (OSPI) > + > +maintainers: > + - Patrice Chotard <patrice.chotard@foss.st.com> > + > +allOf: > + - $ref: spi-controller.yaml# > + > +properties: > + compatible: > + const: st,stm32mp25-ospi > + > + reg: > + description: registers That's not helping. Please take a look how other bindings do it. maxItems instead or you need to list the items with meaningful description. > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 0 Drop *cells. > + > + memory-region: > + maxItems: 1 > + description: Phandle to a node describing memory-map region to be used Drop description, redundant. Say something useful - the purpose - or just maxItems if purpose is obvious. > + > + clocks: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + resets: > + maxItems: 2 You need to list and describe the items. > + > + dmas: > + items: > + - description: tx DMA channel > + - description: rx DMA channel maxItems: 2 is enough, because names define what these are > + > + dma-names: > + items: > + - const: tx > + - const: rx > + > + st,syscfg-dlyb: > + description: | > + Use to set the OSPI delay block within SYSCFG to: Phandles to what? Describe also the destination device. > + Tune the phase of the RX sampling clock (or DQS) in order Unneeded indentation. > + to sample the data in their valid window. > + Tune the phase of the TX launch clock in order to meet setup > + and hold constraints of TX signals versus the memory clock. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + minItems: 2 > + maxItems: 2 Your example has only one item, so probably you wanted one more items with description. Now you miss one of matrix constraints. git grep -C 8 phandle-array (e.g. some sram or syscon examples) > + > + access-controllers: > + minItems: 1 > + maxItems: 2 List the items. > + > + power-domains: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - "#address-cells" > + - "#size-cells" Drop cells > + - clocks > + - interrupts > + - st,syscfg-dlyb > + > +unevaluatedProperties: false > + Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/spi/st,stm32-ospi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-ospi.yaml new file mode 100644 index 000000000000..bf16252f85fa --- /dev/null +++ b/Documentation/devicetree/bindings/spi/st,stm32-ospi.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/st,stm32-ospi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 Octal Serial Peripheral Interface (OSPI) + +maintainers: + - Patrice Chotard <patrice.chotard@foss.st.com> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: st,stm32mp25-ospi + + reg: + description: registers + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + memory-region: + maxItems: 1 + description: Phandle to a node describing memory-map region to be used + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + resets: + maxItems: 2 + + dmas: + items: + - description: tx DMA channel + - description: rx DMA channel + + dma-names: + items: + - const: tx + - const: rx + + st,syscfg-dlyb: + description: | + Use to set the OSPI delay block within SYSCFG to: + Tune the phase of the RX sampling clock (or DQS) in order + to sample the data in their valid window. + Tune the phase of the TX launch clock in order to meet setup + and hold constraints of TX signals versus the memory clock. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + minItems: 2 + maxItems: 2 + + access-controllers: + minItems: 1 + maxItems: 2 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - clocks + - interrupts + - st,syscfg-dlyb + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/st,stm32mp25-rcc.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/st,stm32mp25-rcc.h> + spi@40430000 { + compatible = "st,stm32mp25-ospi"; + reg = <0x40430000 0x400>; + memory-region = <&mm_ospi1>; + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&hpdma 2 0x62 0x00003121 0x0>, + <&hpdma 2 0x42 0x00003112 0x0>; + dma-names = "tx", "rx"; + clocks = <&scmi_clk CK_SCMI_OSPI1>; + resets = <&scmi_reset RST_SCMI_OSPI1>, <&scmi_reset RST_SCMI_OSPI1DLL>; + access-controllers = <&rifsc 74>; + power-domains = <&CLUSTER_PD>; + st,syscfg-dlyb = <&syscfg 0x1000>; + + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + }; + };