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} +static int scmi_clk_set_spread_spectrum_imx(struct clk_hw *hw, + struct clk_spread_spectrum *clk_ss) +{ + struct scmi_clk *clk = to_scmi_clk(hw); + int ret; + u32 val; + + /* SCMI OEM Duty Cycle is expressed as a percentage */ + /* + * extConfigValue[7:0] - spread percentage (%) + * extConfigValue[23:8] - Modulation Frequency (KHz) + * extConfigValue[24] - Enable/Disable + * extConfigValue[31:25] - Reserved + */ + val = FIELD_PREP(IMX_CLOCK_EXT_SS_PERCENTAGE_MASK, clk_ss->spreadpercent); + val |= FIELD_PREP(IMX_CLOCK_EXT_SS_MOD_FREQ_MASK, clk_ss->modfreq); + val |= IMX_CLOCK_EXT_SS_ENABLE_MASK; + ret = scmi_proto_clk_ops->config_oem_set(clk->ph, clk->id, + SCMI_CLOCK_CFG_NXP_IMX_SSC, + val, false); + if (ret) + dev_warn(clk->dev, + "Failed to set spread spectrum(%u,%u,%u) for clock ID %d\n", + clk_ss->modfreq, clk_ss->spreadpercent, clk_ss->method, + clk->id); + + return ret; +} + static u8 scmi_clk_get_parent(struct clk_hw *hw) { struct scmi_clk *clk = to_scmi_clk(hw); @@ -266,6 +295,11 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk, * Return: A pointer to the allocated and configured clk_ops on success, * or NULL on allocation failure. */ +static const char * const scmi_clk_ssc_allowlist[] = { + "fsl,imx95", + NULL +}; + static const struct clk_ops * scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key) { @@ -316,6 +350,9 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key) ops->set_duty_cycle = scmi_clk_set_duty_cycle; } + if (of_machine_compatible_match(scmi_clk_ssc_allowlist)) + ops->set_spread_spectrum = scmi_clk_set_spread_spectrum_imx; + return ops; } diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index 688466a0e816247d24704f7ba109667a14226b67..7012d5efef00eb7b52f17d0f3d8d69f3d0063557 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -80,9 +80,14 @@ enum scmi_clock_oem_config { SCMI_CLOCK_CFG_DUTY_CYCLE = 0x1, SCMI_CLOCK_CFG_PHASE, SCMI_CLOCK_CFG_OEM_START = 0x80, + SCMI_CLOCK_CFG_NXP_IMX_SSC = 0x80, SCMI_CLOCK_CFG_OEM_END = 0xFF, }; +#define IMX_CLOCK_EXT_SS_PERCENTAGE_MASK GENMASK(7, 0) +#define IMX_CLOCK_EXT_SS_MOD_FREQ_MASK GENMASK(23, 8) +#define IMX_CLOCK_EXT_SS_ENABLE_MASK BIT(24) + /** * struct scmi_clk_proto_ops - represents the various operations provided * by SCMI Clock Protocol