@@ -225,6 +225,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
50000000);
if (IS_ERR(hw))
goto err_free;
+ sam9x60_pmc->chws[SAM9X60_PMC_MAIN_RC] = hw;
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
if (IS_ERR(hw))
@@ -758,6 +758,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
50000000);
if (IS_ERR(hw))
goto err_free;
+ sam9x7_pmc->chws[SAM9X7_PMC_MAIN_RC] = hw;
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
if (IS_ERR(hw))
@@ -1131,6 +1131,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
50000000);
if (IS_ERR(main_rc_hw))
goto err_free;
+ sama7d65_pmc->chws[SAMA7D65_PMC_MAIN_RC] = hw;
bypass = of_property_read_bool(np, "atmel,osc-bypass");
@@ -1012,6 +1012,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
50000000);
if (IS_ERR(main_rc_hw))
goto err_free;
+ sama7g5_pmc->chws[SAMA7G5_PMC_MAIN_RC] = hw;
bypass = of_property_read_bool(np, "atmel,osc-bypass");
SAM9X60 Datasheet (DS60001579G) Section "23.4 Product Dependencies" says: "The OTPC is clocked through the Power Management Controller (PMC). The user must power on the main RC oscillator and enable the peripheral clock of the OTPC prior to reading or writing the OTP memory." The code for enabling/disabling that clock is already present, it was just not possible to hook into DT anymore, after at91 clk devicetree binding rework back in 2018 for kernel v4.19. Do it for all controllers with an OTPC controller, where the main rc oscillator is required for proper operation. Signed-off-by: Alexander Dahl <ada@thorsis.com> --- Notes: v2: - split out dt-bindings changes into separate patch - extend to drivers for other SoCs providing the OTPC drivers/clk/at91/sam9x60.c | 1 + drivers/clk/at91/sam9x7.c | 1 + drivers/clk/at91/sama7d65.c | 1 + drivers/clk/at91/sama7g5.c | 1 + 4 files changed, 4 insertions(+)