| Message ID | 20250211065304.5019-3-ada@thorsis.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Microchip OTPC driver on SAM9X60 exposing UIDxR as additional nvmem device | expand |
Hi, Alexander, On 11.02.2025 08:53, Alexander Dahl wrote: > Without enabling the main rc clock, initializing the packet list leads > to a read timeout on the first packet, at least on sam9x60. > > According to SAM9X60 datasheet (DS60001579G) section "23.4 Product > Dependencies" the clock must be enabled for reading and writing. > > Tested on sam9x60-curiosity board. > > Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u > Signed-off-by: Alexander Dahl <ada@thorsis.com> > --- > > Notes: > v2: > - Rewrite to enable _all_ clocks defined in dts > > drivers/nvmem/microchip-otpc.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c > index d39f2d57e5f5e..2c524c163b7e2 100644 > --- a/drivers/nvmem/microchip-otpc.c > +++ b/drivers/nvmem/microchip-otpc.c > @@ -8,6 +8,7 @@ > */ > > #include <linux/bitfield.h> > +#include <linux/clk.h> > #include <linux/iopoll.h> > #include <linux/module.h> > #include <linux/nvmem-provider.h> > @@ -241,6 +242,7 @@ static struct nvmem_config mchp_nvmem_config = { > static int mchp_otpc_probe(struct platform_device *pdev) > { > struct nvmem_device *nvmem; > + struct clk_bulk_data *clks; > struct mchp_otpc *otpc; > u32 size; > int ret; > @@ -253,6 +255,11 @@ static int mchp_otpc_probe(struct platform_device *pdev) > if (IS_ERR(otpc->base)) > return PTR_ERR(otpc->base); > > + ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &clks); > + if (ret < 0) > + return dev_err_probe(&pdev->dev, ret, > + "Error getting clocks!\n"); This fits on a single line. > + > otpc->dev = &pdev->dev; > ret = mchp_otpc_init_packets_list(otpc, &size); > if (ret) General remark: please organize your patches as follows: - dt-bindings patches - driver patches - device tree binding patches Applying this to your series, will result the following order: - dt bindings for clocks - driver changes for clocks - dt-bindings for nvmeme - driver changes for nvmem - device tree for clocks - device tree for nvmem Thank you, Claudiu
diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c index d39f2d57e5f5e..2c524c163b7e2 100644 --- a/drivers/nvmem/microchip-otpc.c +++ b/drivers/nvmem/microchip-otpc.c @@ -8,6 +8,7 @@ */ #include <linux/bitfield.h> +#include <linux/clk.h> #include <linux/iopoll.h> #include <linux/module.h> #include <linux/nvmem-provider.h> @@ -241,6 +242,7 @@ static struct nvmem_config mchp_nvmem_config = { static int mchp_otpc_probe(struct platform_device *pdev) { struct nvmem_device *nvmem; + struct clk_bulk_data *clks; struct mchp_otpc *otpc; u32 size; int ret; @@ -253,6 +255,11 @@ static int mchp_otpc_probe(struct platform_device *pdev) if (IS_ERR(otpc->base)) return PTR_ERR(otpc->base); + ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &clks); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "Error getting clocks!\n"); + otpc->dev = &pdev->dev; ret = mchp_otpc_init_packets_list(otpc, &size); if (ret)
Without enabling the main rc clock, initializing the packet list leads to a read timeout on the first packet, at least on sam9x60. According to SAM9X60 datasheet (DS60001579G) section "23.4 Product Dependencies" the clock must be enabled for reading and writing. Tested on sam9x60-curiosity board. Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u Signed-off-by: Alexander Dahl <ada@thorsis.com> --- Notes: v2: - Rewrite to enable _all_ clocks defined in dts drivers/nvmem/microchip-otpc.c | 7 +++++++ 1 file changed, 7 insertions(+)