| Message ID | 20250215100615.808-3-chunfeng.yun@mediatek.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v3,1/4] dt-bindings: usb: mtk-xhci: add support mt8196 | expand |
Il 15/02/25 11:06, Chunfeng Yun ha scritto: > There are three USB controllers on mt8196, each controller's wakeup > control is different, add some specific versions for them. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Since all of the USB controllers of the MT8196 SoC are behind MTU3, and since the wakeup control for all of them will be handled by the MTU3 driver and *not* by the xhci-mtk driver.... NACK! Please drop this commit. Cheers, Angelo > --- > v3: no changes > v2: modify marcos name > --- > drivers/usb/host/xhci-mtk.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c > index 904831344440..3f8e37b25322 100644 > --- a/drivers/usb/host/xhci-mtk.c > +++ b/drivers/usb/host/xhci-mtk.c > @@ -113,6 +113,14 @@ > #define WC1_IS_P_95 BIT(12) > #define WC1_IS_EN_P0_95 BIT(6) > > +/* mt8196 */ > +#define PERI_WK_CTRL0_8196 0x08 > +#define WC0_IS_EN_P0_96 BIT(0) > +#define WC0_IS_EN_P1_96 BIT(7) > + > +#define PERI_WK_CTRL1_8196 0x10 > +#define WC1_IS_EN_P2_96 BIT(0) > + > /* mt2712 etc */ > #define PERI_SSUSB_SPM_CTRL 0x0 > #define SSC_IP_SLEEP_EN BIT(4) > @@ -129,6 +137,9 @@ enum ssusb_uwk_vers { > SSUSB_UWK_V1_4, /* mt8195 IP1 */ > SSUSB_UWK_V1_5, /* mt8195 IP2 */ > SSUSB_UWK_V1_6, /* mt8195 IP3 */ > + SSUSB_UWK_V1_7, /* mt8196 IP0 */ > + SSUSB_UWK_V1_8, /* mt8196 IP1 */ > + SSUSB_UWK_V1_9, /* mt8196 IP2 */ > }; > > /* > @@ -381,6 +392,21 @@ static void usb_wakeup_ip_sleep_set(struct xhci_hcd_mtk *mtk, bool enable) > msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; > val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : 0; > break; > + case SSUSB_UWK_V1_7: > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; > + msk = WC0_IS_EN_P0_96; > + val = enable ? msk : 0; > + break; > + case SSUSB_UWK_V1_8: > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; > + msk = WC0_IS_EN_P1_96; > + val = enable ? msk : 0; > + break; > + case SSUSB_UWK_V1_9: > + reg = mtk->uwk_reg_base + PERI_WK_CTRL1_8196; > + msk = WC1_IS_EN_P2_96; > + val = enable ? msk : 0; > + break; > case SSUSB_UWK_V2: > reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL; > msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
On Tue, 2025-02-18 at 09:57 +0100, AngeloGioacchino Del Regno wrote: > External email : Please do not click links or open attachments until > you have verified the sender or the content. > > > Il 15/02/25 11:06, Chunfeng Yun ha scritto: > > There are three USB controllers on mt8196, each controller's wakeup > > control is different, add some specific versions for them. > > > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> > > Since all of the USB controllers of the MT8196 SoC are behind MTU3, > and > since the wakeup control for all of them will be handled by the MTU3 > driver > and *not* by the xhci-mtk driver.... As I explained before, this is used for back compatible, and we always use host only for some projects, and don not use mtu3 driver, that will make dts complicated. > > NACK! > > Please drop this commit. And xhci-mtk's patch is higher priority than mtu3's, I already add mtu3's patch as you suggestion, but I still hope to keep it. provide one more option is better for our customers. Thanks. > > Cheers, > Angelo > > > --- > > v3: no changes > > v2: modify marcos name > > --- > > drivers/usb/host/xhci-mtk.c | 26 ++++++++++++++++++++++++++ > > 1 file changed, 26 insertions(+) > > > > diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci- > > mtk.c > > index 904831344440..3f8e37b25322 100644 > > --- a/drivers/usb/host/xhci-mtk.c > > +++ b/drivers/usb/host/xhci-mtk.c > > @@ -113,6 +113,14 @@ > > #define WC1_IS_P_95 BIT(12) > > #define WC1_IS_EN_P0_95 BIT(6) > > > > +/* mt8196 */ > > +#define PERI_WK_CTRL0_8196 0x08 > > +#define WC0_IS_EN_P0_96 BIT(0) > > +#define WC0_IS_EN_P1_96 BIT(7) > > + > > +#define PERI_WK_CTRL1_8196 0x10 > > +#define WC1_IS_EN_P2_96 BIT(0) > > + > > /* mt2712 etc */ > > #define PERI_SSUSB_SPM_CTRL 0x0 > > #define SSC_IP_SLEEP_EN BIT(4) > > @@ -129,6 +137,9 @@ enum ssusb_uwk_vers { > > SSUSB_UWK_V1_4, /* mt8195 IP1 */ > > SSUSB_UWK_V1_5, /* mt8195 IP2 */ > > SSUSB_UWK_V1_6, /* mt8195 IP3 */ > > + SSUSB_UWK_V1_7, /* mt8196 IP0 */ > > + SSUSB_UWK_V1_8, /* mt8196 IP1 */ > > + SSUSB_UWK_V1_9, /* mt8196 IP2 */ > > }; > > > > /* > > @@ -381,6 +392,21 @@ static void usb_wakeup_ip_sleep_set(struct > > xhci_hcd_mtk *mtk, bool enable) > > msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | > > WC0_IS_P_95; > > val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : > > 0; > > break; > > + case SSUSB_UWK_V1_7: > > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; > > + msk = WC0_IS_EN_P0_96; > > + val = enable ? msk : 0; > > + break; > > + case SSUSB_UWK_V1_8: > > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; > > + msk = WC0_IS_EN_P1_96; > > + val = enable ? msk : 0; > > + break; > > + case SSUSB_UWK_V1_9: > > + reg = mtk->uwk_reg_base + PERI_WK_CTRL1_8196; > > + msk = WC1_IS_EN_P2_96; > > + val = enable ? msk : 0; > > + break; > > case SSUSB_UWK_V2: > > reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL; > > msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN; > > >
On Tue, 2025-02-18 at 09:57 +0100, AngeloGioacchino Del Regno wrote: > External email : Please do not click links or open attachments until > you have verified the sender or the content. > > > Il 15/02/25 11:06, Chunfeng Yun ha scritto: > > There are three USB controllers on mt8196, each controller's wakeup > > control is different, add some specific versions for them. > > > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> > > Since all of the USB controllers of the MT8196 SoC are behind MTU3, > and > since the wakeup control for all of them will be handled by the MTU3 > driver > and *not* by the xhci-mtk driver.... > > NACK! > > Please drop this commit. Please help to pick up these patches, I also hate to add these specific wakeup ways, but our haredware designer do not follow the hwip rules sometimes. Thank you. > > Cheers, > Angelo > > > --- > > v3: no changes > > v2: modify marcos name > > --- > > drivers/usb/host/xhci-mtk.c | 26 ++++++++++++++++++++++++++ > > 1 file changed, 26 insertions(+) > > > > diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci- > > mtk.c > > index 904831344440..3f8e37b25322 100644 > > --- a/drivers/usb/host/xhci-mtk.c > > +++ b/drivers/usb/host/xhci-mtk.c > > @@ -113,6 +113,14 @@ > > #define WC1_IS_P_95 BIT(12) > > #define WC1_IS_EN_P0_95 BIT(6) > > > > +/* mt8196 */ > > +#define PERI_WK_CTRL0_8196 0x08 > > +#define WC0_IS_EN_P0_96 BIT(0) > > +#define WC0_IS_EN_P1_96 BIT(7) > > + > > +#define PERI_WK_CTRL1_8196 0x10 > > +#define WC1_IS_EN_P2_96 BIT(0) > > + > > /* mt2712 etc */ > > #define PERI_SSUSB_SPM_CTRL 0x0 > > #define SSC_IP_SLEEP_EN BIT(4) > > @@ -129,6 +137,9 @@ enum ssusb_uwk_vers { > > SSUSB_UWK_V1_4, /* mt8195 IP1 */ > > SSUSB_UWK_V1_5, /* mt8195 IP2 */ > > SSUSB_UWK_V1_6, /* mt8195 IP3 */ > > + SSUSB_UWK_V1_7, /* mt8196 IP0 */ > > + SSUSB_UWK_V1_8, /* mt8196 IP1 */ > > + SSUSB_UWK_V1_9, /* mt8196 IP2 */ > > }; > > > > /* > > @@ -381,6 +392,21 @@ static void usb_wakeup_ip_sleep_set(struct > > xhci_hcd_mtk *mtk, bool enable) > > msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | > > WC0_IS_P_95; > > val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : > > 0; > > break; > > + case SSUSB_UWK_V1_7: > > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; > > + msk = WC0_IS_EN_P0_96; > > + val = enable ? msk : 0; > > + break; > > + case SSUSB_UWK_V1_8: > > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; > > + msk = WC0_IS_EN_P1_96; > > + val = enable ? msk : 0; > > + break; > > + case SSUSB_UWK_V1_9: > > + reg = mtk->uwk_reg_base + PERI_WK_CTRL1_8196; > > + msk = WC1_IS_EN_P2_96; > > + val = enable ? msk : 0; > > + break; > > case SSUSB_UWK_V2: > > reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL; > > msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN; > > >
Il 22/02/25 09:33, Chunfeng Yun (云春峰) ha scritto: > On Tue, 2025-02-18 at 09:57 +0100, AngeloGioacchino Del Regno wrote: >> External email : Please do not click links or open attachments until >> you have verified the sender or the content. >> >> >> Il 15/02/25 11:06, Chunfeng Yun ha scritto: >>> There are three USB controllers on mt8196, each controller's wakeup >>> control is different, add some specific versions for them. >>> >>> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> >> >> Since all of the USB controllers of the MT8196 SoC are behind MTU3, >> and >> since the wakeup control for all of them will be handled by the MTU3 >> driver >> and *not* by the xhci-mtk driver.... >> >> NACK! >> >> Please drop this commit. > Please help to pick up these patches, I also hate to add these specific > wakeup ways, but our haredware designer do not follow the hwip rules > sometimes. > That makes this commit have sense, then. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Thank you. > >> >> Cheers, >> Angelo >> >>> --- >>> v3: no changes >>> v2: modify marcos name >>> --- >>> drivers/usb/host/xhci-mtk.c | 26 ++++++++++++++++++++++++++ >>> 1 file changed, 26 insertions(+) >>> >>> diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci- >>> mtk.c >>> index 904831344440..3f8e37b25322 100644 >>> --- a/drivers/usb/host/xhci-mtk.c >>> +++ b/drivers/usb/host/xhci-mtk.c >>> @@ -113,6 +113,14 @@ >>> #define WC1_IS_P_95 BIT(12) >>> #define WC1_IS_EN_P0_95 BIT(6) >>> >>> +/* mt8196 */ >>> +#define PERI_WK_CTRL0_8196 0x08 >>> +#define WC0_IS_EN_P0_96 BIT(0) >>> +#define WC0_IS_EN_P1_96 BIT(7) >>> + >>> +#define PERI_WK_CTRL1_8196 0x10 >>> +#define WC1_IS_EN_P2_96 BIT(0) >>> + >>> /* mt2712 etc */ >>> #define PERI_SSUSB_SPM_CTRL 0x0 >>> #define SSC_IP_SLEEP_EN BIT(4) >>> @@ -129,6 +137,9 @@ enum ssusb_uwk_vers { >>> SSUSB_UWK_V1_4, /* mt8195 IP1 */ >>> SSUSB_UWK_V1_5, /* mt8195 IP2 */ >>> SSUSB_UWK_V1_6, /* mt8195 IP3 */ >>> + SSUSB_UWK_V1_7, /* mt8196 IP0 */ >>> + SSUSB_UWK_V1_8, /* mt8196 IP1 */ >>> + SSUSB_UWK_V1_9, /* mt8196 IP2 */ >>> }; >>> >>> /* >>> @@ -381,6 +392,21 @@ static void usb_wakeup_ip_sleep_set(struct >>> xhci_hcd_mtk *mtk, bool enable) >>> msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | >>> WC0_IS_P_95; >>> val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : >>> 0; >>> break; >>> + case SSUSB_UWK_V1_7: >>> + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; >>> + msk = WC0_IS_EN_P0_96; >>> + val = enable ? msk : 0; >>> + break; >>> + case SSUSB_UWK_V1_8: >>> + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; >>> + msk = WC0_IS_EN_P1_96; >>> + val = enable ? msk : 0; >>> + break; >>> + case SSUSB_UWK_V1_9: >>> + reg = mtk->uwk_reg_base + PERI_WK_CTRL1_8196; >>> + msk = WC1_IS_EN_P2_96; >>> + val = enable ? msk : 0; >>> + break; >>> case SSUSB_UWK_V2: >>> reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL; >>> msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN; >> >> >>
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c index 904831344440..3f8e37b25322 100644 --- a/drivers/usb/host/xhci-mtk.c +++ b/drivers/usb/host/xhci-mtk.c @@ -113,6 +113,14 @@ #define WC1_IS_P_95 BIT(12) #define WC1_IS_EN_P0_95 BIT(6) +/* mt8196 */ +#define PERI_WK_CTRL0_8196 0x08 +#define WC0_IS_EN_P0_96 BIT(0) +#define WC0_IS_EN_P1_96 BIT(7) + +#define PERI_WK_CTRL1_8196 0x10 +#define WC1_IS_EN_P2_96 BIT(0) + /* mt2712 etc */ #define PERI_SSUSB_SPM_CTRL 0x0 #define SSC_IP_SLEEP_EN BIT(4) @@ -129,6 +137,9 @@ enum ssusb_uwk_vers { SSUSB_UWK_V1_4, /* mt8195 IP1 */ SSUSB_UWK_V1_5, /* mt8195 IP2 */ SSUSB_UWK_V1_6, /* mt8195 IP3 */ + SSUSB_UWK_V1_7, /* mt8196 IP0 */ + SSUSB_UWK_V1_8, /* mt8196 IP1 */ + SSUSB_UWK_V1_9, /* mt8196 IP2 */ }; /* @@ -381,6 +392,21 @@ static void usb_wakeup_ip_sleep_set(struct xhci_hcd_mtk *mtk, bool enable) msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : 0; break; + case SSUSB_UWK_V1_7: + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; + msk = WC0_IS_EN_P0_96; + val = enable ? msk : 0; + break; + case SSUSB_UWK_V1_8: + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196; + msk = WC0_IS_EN_P1_96; + val = enable ? msk : 0; + break; + case SSUSB_UWK_V1_9: + reg = mtk->uwk_reg_base + PERI_WK_CTRL1_8196; + msk = WC1_IS_EN_P2_96; + val = enable ? msk : 0; + break; case SSUSB_UWK_V2: reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL; msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
There are three USB controllers on mt8196, each controller's wakeup control is different, add some specific versions for them. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> --- v3: no changes v2: modify marcos name --- drivers/usb/host/xhci-mtk.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)