| Message ID | 20250218-pinctrl_defines-v2-1-c554cad0e1d2@gocontroll.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: imx8m: Add pinctrl config definitions | expand |
On Tue, Feb 18, 2025 at 09:39:16AM +0100, Maud Spierings wrote: > Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this > register is written in the dts, these values are not obvious. Add defines > which describe the fields of this register which can be or-ed together to > produce readable settings. > > Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> > --- > arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > Why are you adding defines which have no users? This is just dead code. Best regards, Krzysztof
From: Krzysztof Kozlowski <krzk@kernel.org> Sent: Sunday, February 23, 2025 11:27 AM >On Tue, Feb 18, 2025 at 09:39:16AM +0100, Maud Spierings wrote: >> Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this >> register is written in the dts, these values are not obvious. Add defines >> which describe the fields of this register which can be or-ed together to >> produce readable settings. >> >> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> >> --- >> arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++ >> 1 file changed, 27 insertions(+) >> >Why are you adding defines which have no users? This is just dead code. I will be sending more patches in the near future that will use these bindings, the total stack of patches is starting to grow though so I'm trying to spread it out in multiple easy to manage bits. It is also a bit of a test if I can continue using these defines as I plan, or if that will not be accepted and I should instead revert to using raw hex values. If this is a problem then I will keep it in the larger patchset that is to come. Kind regards, Maud
On 24/02/2025 08:39, Maud Spierings | GOcontroll wrote: > From: Krzysztof Kozlowski <krzk@kernel.org> > Sent: Sunday, February 23, 2025 11:27 AM > >> On Tue, Feb 18, 2025 at 09:39:16AM +0100, Maud Spierings wrote: >>> Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this >>> register is written in the dts, these values are not obvious. Add defines >>> which describe the fields of this register which can be or-ed together to >>> produce readable settings. >>> >>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> >>> --- >>> arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++ >>> 1 file changed, 27 insertions(+) >>> > >> Why are you adding defines which have no users? This is just dead code. > > I will be sending more patches in the near future that will use these bindings, the total stack of patches is starting to grow though so I'm trying to spread it out in multiple easy to manage bits. > It is also a bit of a test if I can continue using these defines as I plan, or if that will not be accepted and I should instead revert to using raw hex values. Please wrap your replies. > > If this is a problem then I will keep it in the larger patchset that is to come. Defines without users is dead code. It's not even easy to validate if they make any sense without seeing how they are used. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h index b1f11098d248ed5fc8ac42daed808beebe3bf7bc..127fed81bafdd1baee57a02e5be2deb2462e01a2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h +++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h @@ -6,6 +6,33 @@ #ifndef __DTS_IMX8MM_PINFUNC_H #define __DTS_IMX8MM_PINFUNC_H +//Drive Strength +#define MX8MM_DSE_X1 0x0 +#define MX8MM_DSE_X2 0x4 +#define MX8MM_DSE_X4 0x2 +#define MX8MM_DSE_X6 0x6 + +//Slew Rate +#define MX8MM_FSEL_FAST 0x10 +#define MX8MM_FSEL_SLOW 0x0 + +//Open Drain +#define MX8MM_ODE_ENABLE 0x20 +#define MX8MM_ODE_DISABLE 0x0 + +#define MX8MM_PULL_DOWN 0x0 +#define MX8MM_PULL_UP 0x40 + +//Hysteresis +#define MX8MM_HYS_CMOS 0x0 +#define MX8MM_HYS_SCHMITT 0x80 + +#define MX8MM_PULL_ENABLE 0x100 +#define MX8MM_PULL_DISABLE 0x0 + +//SION force input mode +#define MX8MM_SION 0x40000000 + /* * The pin function ID is a tuple of * <mux_reg conf_reg input_reg mux_mode input_val>