| Message ID | 20250220-thermal-v1-1-5168ddfc86e8@jookia.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: dts: allwinner: d1: Add thermal sensor | expand |
Dne četrtek, 20. februar 2025 ob 10:25:10 Srednjeevropski standardni čas je John Watts napisal(a): > From: Maxim Kiselev <bigunclemax@gmail.com> > > This patch adds a thermal sensor controller node for the D1/T113s. > Also it adds a THS calibration data cell to efuse node. > > Signed-off-by: Maxim Kiselev <bigunclemax@gmail.com> > Reviewed-by: Andre Przywara <andre.przywara@arm.com> > Signed-off-by: John Watts <contact@jookia.org> > [John Watts: Remove disabled status] I prefer other patch, which was posted not too long ago since it also has thermal zones. Best regards, Jernej > --- > This is a quick fixed version of Maxim Kiselev's patch from here: > > https://lore.kernel.org/all/20231217210629.131486-4-bigunclemax@gmail.com/ > > It removes the disabled status as requested. I've tested it by adding thermal > zones to my board and it works from what I can see. > --- > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > index e4175adb028da2be539e7aa316206fec4810adfc..cc3f9cc9b8ed20121924cc932412a6b6342a2f86 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -166,6 +166,18 @@ gpadc: adc@2009000 { > #io-channel-cells = <1>; > }; > > + ths: thermal-sensor@2009400 { > + compatible = "allwinner,sun20i-d1-ths"; > + reg = <0x02009400 0x400>; > + interrupts = <SOC_PERIPHERAL_IRQ(58) IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_THS>; > + clock-names = "bus"; > + resets = <&ccu RST_BUS_THS>; > + nvmem-cells = <&ths_calibration>; > + nvmem-cell-names = "calibration"; > + #thermal-sensor-cells = <0>; > + }; > + > dmic: dmic@2031000 { > compatible = "allwinner,sun20i-d1-dmic", > "allwinner,sun50i-h6-dmic"; > @@ -426,6 +438,10 @@ sid: efuse@3006000 { > reg = <0x3006000 0x1000>; > #address-cells = <1>; > #size-cells = <1>; > + > + ths_calibration: thermal-sensor-calibration@14 { > + reg = <0x14 0x4>; > + }; > }; > > crypto: crypto@3040000 { > > --- > base-commit: eca631b8fe808748d7585059c4307005ca5c5820 > change-id: 20250220-thermal-803de9da0ce6 > > Best regards, >
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index e4175adb028da2be539e7aa316206fec4810adfc..cc3f9cc9b8ed20121924cc932412a6b6342a2f86 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -166,6 +166,18 @@ gpadc: adc@2009000 { #io-channel-cells = <1>; }; + ths: thermal-sensor@2009400 { + compatible = "allwinner,sun20i-d1-ths"; + reg = <0x02009400 0x400>; + interrupts = <SOC_PERIPHERAL_IRQ(58) IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_THS>; + clock-names = "bus"; + resets = <&ccu RST_BUS_THS>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <0>; + }; + dmic: dmic@2031000 { compatible = "allwinner,sun20i-d1-dmic", "allwinner,sun50i-h6-dmic"; @@ -426,6 +438,10 @@ sid: efuse@3006000 { reg = <0x3006000 0x1000>; #address-cells = <1>; #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@14 { + reg = <0x14 0x4>; + }; }; crypto: crypto@3040000 {