| Message ID | 20250302153502.181832-2-c-vankar@ti.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add bootph-all property to necessary nodes to enable ethernet boot for AM68-SK, J722s and AM62p-SK | expand |
On Sun, Mar 02, 2025 at 09:05:01PM +0530, Chintan Vankar wrote: > Ethernet boot requires CPSW nodes to be present starting from R5 SPL > stage. Add bootph-all property to required nodes to enable Ethernet boot > on AM68-SK and J721S2-EVM. > > Signed-off-by: Chintan Vankar <c-vankar@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Regards, Siddharth.
On 02/03/25 21:05, Chintan Vankar wrote: > Ethernet boot requires CPSW nodes to be present starting from R5 SPL > stage. Add bootph-all property to required nodes to enable Ethernet boot > on AM68-SK and J721S2-EVM. > > Signed-off-by: Chintan Vankar <c-vankar@ti.com> > --- > > Link to v1: > https://lore.kernel.org/r/20250106123122.3531845-2-c-vankar@ti.com/ > > Changes from v1 to v2: > - No changes. > > arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 3 +++ > arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 4 ++++ > 2 files changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts > index 11522b36e0ce..8e9101dd2152 100644 > --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts > @@ -333,6 +333,7 @@ J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ > J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ > J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ > >; > + bootph-all; > }; > > mcu_mdio_pins_default: mcu-mdio-default-pins { > @@ -340,6 +341,7 @@ mcu_mdio_pins_default: mcu-mdio-default-pins { > J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ > J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ > >; > + bootph-all; > }; > > mcu_mcan0_pins_default: mcu-mcan0-default-pins { > @@ -615,6 +617,7 @@ &mcu_cpsw { > &davinci_mdio { > phy0: ethernet-phy@0 { > reg = <0>; > + bootph-all; > ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; > ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > ti,min-output-impedance; > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > index bc31266126d0..29cd4b1ffbbf 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > @@ -154,12 +154,14 @@ mcu_conf: bus@40f00000 { > cpsw_mac_syscon: ethernet-mac-syscon@200 { > compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; > reg = <0x200 0x8>; > + bootph-all; > }; > > phy_gmii_sel: phy@4040 { > compatible = "ti,am654-phy-gmii-sel"; > reg = <0x4040 0x4>; > #phy-cells = <1>; > + bootph-all; > }; > > }; > @@ -538,6 +540,7 @@ mcu_cpsw: ethernet@46000000 { > clocks = <&k3_clks 29 28>; > clock-names = "fck"; > power-domains = <&k3_pds 29 TI_SCI_PD_EXCLUSIVE>; > + bootph-all; > Since a child node has bootph-all, no need to put the same in the parent hierarchy. > dmas = <&mcu_udmap 0xf000>, > <&mcu_udmap 0xf001>, > @@ -562,6 +565,7 @@ cpsw_port1: port@1 { > label = "port1"; > ti,syscon-efuse = <&cpsw_mac_syscon 0x0>; > phys = <&phy_gmii_sel 1>; > + bootph-all; > }; > }; >
Hello Vignesh, On 3/3/2025 1:44 PM, Vignesh Raghavendra wrote: > > > On 02/03/25 21:05, Chintan Vankar wrote: >> Ethernet boot requires CPSW nodes to be present starting from R5 SPL >> stage. Add bootph-all property to required nodes to enable Ethernet boot >> on AM68-SK and J721S2-EVM. >> >> Signed-off-by: Chintan Vankar <c-vankar@ti.com> >> --- >> >> Link to v1: >> https://lore.kernel.org/r/20250106123122.3531845-2-c-vankar@ti.com/ >> >> Changes from v1 to v2: >> - No changes. >> >> arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 3 +++ >> arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 4 ++++ >> 2 files changed, 7 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts >> index 11522b36e0ce..8e9101dd2152 100644 >> --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts >> +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts >> @@ -333,6 +333,7 @@ J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ >> J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ >> J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ >> >; >> + bootph-all; >> }; >> >> mcu_mdio_pins_default: mcu-mdio-default-pins { >> @@ -340,6 +341,7 @@ mcu_mdio_pins_default: mcu-mdio-default-pins { >> J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ >> J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ >> >; >> + bootph-all; >> }; >> >> mcu_mcan0_pins_default: mcu-mcan0-default-pins { >> @@ -615,6 +617,7 @@ &mcu_cpsw { >> &davinci_mdio { >> phy0: ethernet-phy@0 { >> reg = <0>; >> + bootph-all; >> ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; >> ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; >> ti,min-output-impedance; >> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi >> index bc31266126d0..29cd4b1ffbbf 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi >> @@ -154,12 +154,14 @@ mcu_conf: bus@40f00000 { >> cpsw_mac_syscon: ethernet-mac-syscon@200 { >> compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; >> reg = <0x200 0x8>; >> + bootph-all; >> }; >> >> phy_gmii_sel: phy@4040 { >> compatible = "ti,am654-phy-gmii-sel"; >> reg = <0x4040 0x4>; >> #phy-cells = <1>; >> + bootph-all; >> }; >> >> }; >> @@ -538,6 +540,7 @@ mcu_cpsw: ethernet@46000000 { >> clocks = <&k3_clks 29 28>; >> clock-names = "fck"; >> power-domains = <&k3_pds 29 TI_SCI_PD_EXCLUSIVE>; >> + bootph-all; >> > > Since a child node has bootph-all, no need to put the same in the parent > hierarchy. > Thank you for pointing this out, I will remove it from the parent node and post the next version. Regards, Chintan. >> dmas = <&mcu_udmap 0xf000>, >> <&mcu_udmap 0xf001>, >> @@ -562,6 +565,7 @@ cpsw_port1: port@1 { >> label = "port1"; >> ti,syscon-efuse = <&cpsw_mac_syscon 0x0>; >> phys = <&phy_gmii_sel 1>; >> + bootph-all; >> }; >> }; >> > >
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts index 11522b36e0ce..8e9101dd2152 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -333,6 +333,7 @@ J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ >; + bootph-all; }; mcu_mdio_pins_default: mcu-mdio-default-pins { @@ -340,6 +341,7 @@ mcu_mdio_pins_default: mcu-mdio-default-pins { J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ >; + bootph-all; }; mcu_mcan0_pins_default: mcu-mcan0-default-pins { @@ -615,6 +617,7 @@ &mcu_cpsw { &davinci_mdio { phy0: ethernet-phy@0 { reg = <0>; + bootph-all; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; ti,min-output-impedance; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index bc31266126d0..29cd4b1ffbbf 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -154,12 +154,14 @@ mcu_conf: bus@40f00000 { cpsw_mac_syscon: ethernet-mac-syscon@200 { compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; reg = <0x200 0x8>; + bootph-all; }; phy_gmii_sel: phy@4040 { compatible = "ti,am654-phy-gmii-sel"; reg = <0x4040 0x4>; #phy-cells = <1>; + bootph-all; }; }; @@ -538,6 +540,7 @@ mcu_cpsw: ethernet@46000000 { clocks = <&k3_clks 29 28>; clock-names = "fck"; power-domains = <&k3_pds 29 TI_SCI_PD_EXCLUSIVE>; + bootph-all; dmas = <&mcu_udmap 0xf000>, <&mcu_udmap 0xf001>, @@ -562,6 +565,7 @@ cpsw_port1: port@1 { label = "port1"; ti,syscon-efuse = <&cpsw_mac_syscon 0x0>; phys = <&phy_gmii_sel 1>; + bootph-all; }; };
Ethernet boot requires CPSW nodes to be present starting from R5 SPL stage. Add bootph-all property to required nodes to enable Ethernet boot on AM68-SK and J721S2-EVM. Signed-off-by: Chintan Vankar <c-vankar@ti.com> --- Link to v1: https://lore.kernel.org/r/20250106123122.3531845-2-c-vankar@ti.com/ Changes from v1 to v2: - No changes. arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 3 +++ arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 4 ++++ 2 files changed, 7 insertions(+)