From patchwork Mon Mar 10 10:49:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 14009659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F756C282DE for ; Mon, 10 Mar 2025 11:21:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Sbr4sCthiHghLZFUGrTZdA0WJ+e/O3nVoV4Mae1CwPw=; b=HjzoQdkduTmTm4yI2TxoBi3kUd FW7ZGKEjWzMi8hRQdMTl1ibY3EuncfE4+JEBxjbS3qgFPYAMVXrfzUnRkQQndJtcWErM25eDDSb5w ngkNGsBOmjCONeTxOObnQJIMtqGMl7bneEZPu/ag8f/jPQhPCVFBrBJM/ikWb78Jl/pDeCOqubQKm +B3v6Ppd8dTerlhNguoncaEmcQOjGRj7ZxyKFZOq4lDTcYW9AapI1fZx/Wp8t2MS6ib87DhDSYWsE +DlHCIr2oHwa3tyVeIL1YjtpKQAcIsaYQKqpVtVCD6YGbJQyz9uDHq6ddq+8/lmbHrygQkv+Oefol Mq1Q5B/g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1trbBs-00000002PtM-45kb; Mon, 10 Mar 2025 11:21:00 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1trahU-00000002JLQ-3VRw for linux-arm-kernel@lists.infradead.org; Mon, 10 Mar 2025 10:49:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1337F15A1; Mon, 10 Mar 2025 03:49:48 -0700 (PDT) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CB3C33F673; Mon, 10 Mar 2025 03:49:34 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Arnaldo Carvalho de Melo , Namhyung Kim , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v2 4/8] coresight: perf: Support AUX trace pause and resume Date: Mon, 10 Mar 2025 10:49:15 +0000 Message-Id: <20250310104919.58816-5-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250310104919.58816-1-leo.yan@arm.com> References: <20250310104919.58816-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250310_034937_002166_169E09B7 X-CRM114-Status: GOOD ( 18.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This commit supports AUX trace pause and resume in a perf session for Arm CoreSight. First, we need to decide which flag can indicate the CoreSight PMU event has started. The 'event->hw.state' cannot be used for this purpose because its initial value and the value after hardware trace enabling are both 0. On the other hand, the context value 'ctxt->event_data' stores the ETM private info. This pointer is valid only when the PMU event has been enabled. It is safe to permit AUX trace pause and resume operations only when it is not a NULL pointer. To achieve fine-grained control of the pause and resume, only the tracer is disabled and enabled. This avoids the unnecessary complexity and latency caused by manipulating the entire link path. Signed-off-by: Leo Yan --- .../hwtracing/coresight/coresight-etm-perf.c | 40 ++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index ad6a8f4b70b6..29d52386ffbb 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -366,6 +366,18 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, continue; } + /* + * If AUX pause feature is enabled but the ETM driver does not + * support the operations, clear this CPU from the mask and + * continue to next one. + */ + if (event->attr.aux_start_paused && + (!source_ops(csdev)->pause || !source_ops(csdev)->resume)) { + dev_err_once(&csdev->dev, "AUX pause is not supported.\n"); + cpumask_clear_cpu(cpu, mask); + continue; + } + /* * No sink provided - look for a default sink for all the ETMs, * where this event can be scheduled. @@ -451,6 +463,15 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, goto out; } +static void etm_event_resume(struct coresight_device *csdev, + struct etm_ctxt *ctxt) +{ + if (!ctxt->event_data) + return; + + coresight_resume_source(csdev); +} + static void etm_event_start(struct perf_event *event, int flags) { int cpu = smp_processor_id(); @@ -465,6 +486,9 @@ static void etm_event_start(struct perf_event *event, int flags) if (!csdev) goto fail; + if (flags & PERF_EF_RESUME) + return etm_event_resume(csdev, ctxt); + /* Have we messed up our tracking ? */ if (WARN_ON(ctxt->event_data)) goto fail; @@ -550,6 +574,16 @@ static void etm_event_start(struct perf_event *event, int flags) return; } +static void etm_event_pause(struct coresight_device *csdev, + struct etm_ctxt *ctxt) +{ + if (!ctxt->event_data) + return; + + /* Stop tracer */ + coresight_pause_source(csdev); +} + static void etm_event_stop(struct perf_event *event, int mode) { int cpu = smp_processor_id(); @@ -560,6 +594,9 @@ static void etm_event_stop(struct perf_event *event, int mode) struct etm_event_data *event_data; struct list_head *path; + if (mode & PERF_EF_PAUSE) + return etm_event_pause(csdev, ctxt); + /* * If we still have access to the event_data via handle, * confirm that we haven't messed up the tracking. @@ -904,7 +941,8 @@ int __init etm_perf_init(void) int ret; etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE | - PERF_PMU_CAP_ITRACE); + PERF_PMU_CAP_ITRACE | + PERF_PMU_CAP_AUX_PAUSE); etm_pmu.attr_groups = etm_pmu_attr_groups; etm_pmu.task_ctx_nr = perf_sw_context;