From patchwork Mon Mar 10 11:48:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Chen X-Patchwork-Id: 14009788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C5439C282DE for ; Mon, 10 Mar 2025 12:08:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ZPeOALh8hvdV7JWB8QVZ8vIgqd6Fip8BkDA60r1vc3s=; b=kfDr/pGRIxELywXww62cw6WpbJ 0Gmgu9GWE7eLClmW/eulVTalH7St0HgMkN2sx+4k+0uPebISxNRPpwJaZ91oyVhg1AnIKcLQSG1hy 0nncg9ugioR9UGr9vnvpnGLS3BD9K2viRARoUUGFbjIA8rSZgmUorIR9xe6Ahy8Nwi2e/wELvutr7 5jSY7VlGpXzEVqED1JJmi18I/FhrbftvwlnNBqhYKNoCl/ZNSnf+cUPbQdzV685m0VsFSblzBuWpb jJ2Rvhi+o/P06zf9mywTTAbEL3slCK6/FsNK3yULLLzCxTh2SUrI4/DD7VLJWXnjWV9hyCXRqZmbO 3zytYggA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1trbvT-00000002XOb-0A5Z; Mon, 10 Mar 2025 12:08:07 +0000 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1trbcn-00000002Tbc-2Mmi for linux-arm-kernel@lists.infradead.org; Mon, 10 Mar 2025 11:48:50 +0000 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Mon, 10 Mar 2025 19:48:40 +0800 Received: from aspeed-fw03.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Mon, 10 Mar 2025 19:48:40 +0800 From: Kevin Chen To: , , , , , , , , , , , , , CC: Kevin Chen Subject: [PATCH v3 1/3] dt-binding: aspeed: Add LPC PCC controller Date: Mon, 10 Mar 2025 19:48:37 +0800 Message-ID: <20250310114839.3098148-2-kevin_chen@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250310114839.3098148-1-kevin_chen@aspeedtech.com> References: <20250310114839.3098148-1-kevin_chen@aspeedtech.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250310_044849_600984_26F7BD18 X-CRM114-Status: UNSURE ( 9.90 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add dt-bindings for Aspeed for Aspeed LPC POST code capture controller. Signed-off-by: Kevin Chen --- .../devicetree/bindings/mfd/aspeed-lpc.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml index 5dfe77aca167..178c151a19ba 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml @@ -149,6 +149,37 @@ patternProperties: - interrupts - snoop-ports + "^lpc-pcc@[0-9a-f]+$": + type: object + additionalProperties: false + + description: + The LPC pcc interface allows the BMC to listen on and record the data + bytes written by the Host to the targeted LPC I/O pots. + + properties: + compatible: + items: + - enum: + - aspeed,ast2600-lpc-pcc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + pcc-ports: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + As a device handshake with a host using the port-mmaped I/O in x86 + architecture, need to handle specific which port I/O address for use. + + required: + - compatible + - interrupts + - pcc-ports + "^uart-routing@[0-9a-f]+$": $ref: /schemas/soc/aspeed/uart-routing.yaml# description: The UART routing control under LPC register space @@ -176,6 +207,13 @@ examples: #size-cells = <1>; ranges = <0x0 0x1e789000 0x1000>; + lpc_pcc: lpc-pcc@0 { + compatible = "aspeed,ast2600-lpc-pcc"; + reg = <0x0 0x140>; + interrupts = ; + pcc-ports = <0x80>; + }; + lpc_ctrl: lpc-ctrl@80 { compatible = "aspeed,ast2600-lpc-ctrl"; reg = <0x80 0x80>;