From patchwork Mon Mar 10 12:24:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 14010001 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A5C6FC282DE for ; Mon, 10 Mar 2025 13:13:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=P1D5auVVCTWKegD+CorUlUchSjKJfd6fJHdTbBIP/EA=; b=VXb1RXQCYT/Lx/NG2vDQcszjbA VSkv1jUdnMsc/6s2DPQx5FeieMutqHbvZq9y+Fnz/O3i8TPhbNC3qoh6xETDQVZvrXGvPjmfQF0z/ wOb6fIyjO+hNi9jiGaTeWnGrNfxLEs1HVSdA6t+jod2BFiEHrA4JuNgHRghglaEbr2SbAey0Zy5o6 axVUVXVangOrEE9T723GmtkJBEXZiAHO5uT6/PHCkWbr+BMzuAdmsHr7tCEvfRhTYdDSZsoCVc5Ux KQKAtFHv21ZkVEB1gjF3Yp5ydCDkM7VYY3gNlAH3IeIcG81+17Sm1dVl7Pn/6rwBX6EjWv1x9zeHd KfyeuWEQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1trcwg-00000002kW5-292t; Mon, 10 Mar 2025 13:13:26 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1trcC4-00000002bSr-2z8d for linux-arm-kernel@lists.infradead.org; Mon, 10 Mar 2025 12:25:18 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id B2C535C631C; Mon, 10 Mar 2025 12:22:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 531BDC4CEEE; Mon, 10 Mar 2025 12:25:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741609516; bh=n7xGkSaTu/32WDYmEBTHnzauO9ZcCrn2FDAI3A+1sSY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hMCocTBnnNtZ9tFCC8ODA7zW7ZlSBQWIn5Ybai5fWG1aBAezAMondCwImZkBKjQGu BeImm7GCqhuJz4UsxPRxWGRKV3DVrYNnJvtFUjwRNgpVdNTDu6paHdlAE/omHqaHnr wIFOCVcbp3syx6x/OA+Vb4quISaPSE2IAe7RNyIHqK396H4WKBpoKIVaX/bXLXgSIy DUDZ4FNu0BvbdjMnA3apGH5bI5zKzgA34A51zDqxAjDah36EEJ3DSUvYd3RuOX1ZHR xEHVwrlpU4uIiKIENokBVXwgMDNsYyT0oOs/+VBqHj9XnlPm7ryT/nqI+oGbccMwvs 3kiv5yI6ogEPw== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1trcC2-00CAea-Fx; Mon, 10 Mar 2025 12:25:14 +0000 From: Marc Zyngier To: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Joey Gouly , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Mark Rutland , Fuad Tabba Subject: [PATCH v2 17/23] KVM: arm64: Handle PSB CSYNC traps Date: Mon, 10 Mar 2025 12:24:59 +0000 Message-Id: <20250310122505.2857610-18-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20250310122505.2857610-1-maz@kernel.org> References: <20250310122505.2857610-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, joey.gouly@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, mark.rutland@arm.com, tabba@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250310_052516_834511_22E8BA2D X-CRM114-Status: GOOD ( 14.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The architecture introduces a trap for PSB CSYNC that fits in the same EC as LS64. Let's deal with it in a similar way as LS64. It's not that we expect this to be useful any time soon anyway. Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/esr.h | 3 ++- arch/arm64/kvm/emulate-nested.c | 1 + arch/arm64/kvm/handle_exit.c | 5 +++++ arch/arm64/tools/sysreg | 2 +- 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 547b4e857a3e2..f340af79679d8 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -175,10 +175,11 @@ #define ESR_ELx_WFx_ISS_WFE (UL(1) << 0) #define ESR_ELx_xVC_IMM_MASK ((UL(1) << 16) - 1) -/* ISS definitions for LD64B/ST64B instructions */ +/* ISS definitions for LD64B/ST64B/PSBCSYNC instructions */ #define ESR_ELx_ISS_OTHER_ST64BV (0) #define ESR_ELx_ISS_OTHER_ST64BV0 (1) #define ESR_ELx_ISS_OTHER_LDST64B (2) +#define ESR_ELx_ISS_OTHER_PSBCSYNC (3) #define DISR_EL1_IDS (UL(1) << 24) /* diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c index f6c7331c21ca4..ebfb2805f716b 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -1996,6 +1996,7 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = { /* Additional FGTs that do not fire with ESR_EL2.EC==0x18 */ static const union trap_config non_0x18_fgt[] __initconst = { + FGT(HFGITR, PSBCSYNC, 1), FGT(HFGITR, nGCSSTR_EL1, 0), FGT(HFGITR, SVC_EL1, 1), FGT(HFGITR, SVC_EL0, 1), diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index bf08c44491b4a..0491eecd521b0 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -343,6 +343,11 @@ static int handle_other(struct kvm_vcpu *vcpu) if (is_l2) fwd = !(hcrx & HCRX_EL2_EnALS); break; + case ESR_ELx_ISS_OTHER_PSBCSYNC: + allowed = kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, V1P5); + if (is_l2) + fwd = (__vcpu_sys_reg(vcpu, HFGITR_EL2) & HFGITR_EL2_PSBCSYNC); + break; default: /* Clearly, we're missing something. */ WARN_ON_ONCE(1); diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 1cf9a07cce522..f680cd6b3bc75 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2641,7 +2641,7 @@ Fields HFGxTR_EL2 EndSysreg Sysreg HFGITR_EL2 3 4 1 1 6 -Res0 63 +Field 63 PSBCSYNC Field 62 ATS1E1A Res0 61 Field 60 COSPRCTX