From patchwork Tue Mar 18 14:02:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liankun Yang X-Patchwork-Id: 14021079 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57E13C282EC for ; Tue, 18 Mar 2025 14:20:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=n1N1uor0+xs1/4OgUrk3Wvc3O6AFf/tYcx3ythp+XII=; b=ZMJ2t9dzdcrGP1pcmgNCXEx0GG +/kRVMqNKLUDrITlhkzj7NBh9hd9i+RtghLjCurOi/djtaT05ULan6nORLYXFS9vBRLR9Vlki941w 4iNR+sbfEbTv9pGHULEIg+h+wvpruXPpKsA2XVrnydnZCapDUnSu8CCzN6I0fajBPPu6k06xPs2LW tkg0th6lQLyOHrbWgNSWpgJhj+VKCe8+skwPPjUlydJmUQHBSSFe6axStvqnAoqZpB7mKZFNHhdE2 4XnlbJOoqUood0gH7oyfCHeE4EUOrEtHzOnNojdG0vvrmTyu0VDU4gJNx9ZD7podQPPvRWczyq6az YSmJfjKg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tuXnU-000000069wk-0pE4; Tue, 18 Mar 2025 14:20:00 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tuXlm-000000069it-0lv0; Tue, 18 Mar 2025 14:18:15 +0000 X-UUID: af3f216c040111f0a1e849db4cc18d44-20250318 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=n1N1uor0+xs1/4OgUrk3Wvc3O6AFf/tYcx3ythp+XII=; b=K6uxwC5qWU2y7xkv1Cf1z0vDAEh7AYyqm+nmMlh6BqaEHL49+zEDwXibTo/qpQrpEXkQD09BTk5y/99jvG3okJJA44fBDCfyVL2ECzfB6XSWXYQFmqIZxs+WHgLeIDdrUcu2bPYhI/e4U019b/Mz/ilf5DXQc7lZAHhcmrJ124Y=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1,REQID:e9b1b26c-1190-4aff-805c-37995a5c8f0f,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:0ef645f,CLOUDID:e3d3878c-f5b8-47d5-8cf3-b68fe7530c9a,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV :0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULS X-UUID: af3f216c040111f0a1e849db4cc18d44-20250318 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 776691331; Tue, 18 Mar 2025 07:02:53 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Tue, 18 Mar 2025 22:02:50 +0800 Received: from mszsdclx1211.gcn.mediatek.inc (10.16.7.31) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Tue, 18 Mar 2025 22:02:49 +0800 From: Liankun Yang To: , , , , , , , , , , CC: , , , Subject: [PATCH v3 1/1] drm/mediatek: Adjust bandwidth limit for DP Date: Tue, 18 Mar 2025 22:02:21 +0800 Message-ID: <20250318140236.13650-2-liankun.yang@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250318140236.13650-1-liankun.yang@mediatek.com> References: <20250318140236.13650-1-liankun.yang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250318_071814_220927_FE8DE4B0 X-CRM114-Status: GOOD ( 16.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org By adjusting the order of link training and relocating it to HPD, link training can identify the usability of each lane in the current link. It also supports handling signal instability and weakness due to environmental issues, enabling the acquisition of a stable bandwidth for the current link. Subsequently, DP work can proceed based on the actual maximum bandwidth. It should training in the hpd event thread. Check the mode with lane count and link rate of training. Signed-off-by: Liankun Yang --- Change in V3: - Remove 'mtk_dp->enabled = false" in atomic disable. - Remove 'mtk_dp->enabled = true" in atomic enable. Per suggestion from the previous thread: https://patchwork.kernel.org/project/linux-mediatek/patch/20241025083036.8829-4-liankun.yang@mediatek.com/ Change in V2: - Adjust DP training timing. - Adjust parse capabilities timing. - Add power on/off for connect/disconnect. Per suggestion from the previous thread: https://patchwork.kernel.org/project/linux-mediatek/patch/20240315015233.2023-1-liankun.yang@mediatek.com/ --- drivers/gpu/drm/mediatek/mtk_dp.c | 39 ++++++++++++++++--------------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index 3d4648d2e15f..fb76fc1bf497 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -1976,6 +1976,7 @@ static irqreturn_t mtk_dp_hpd_event_thread(int hpd, void *dev) struct mtk_dp *mtk_dp = dev; unsigned long flags; u32 status; + int ret; if (mtk_dp->need_debounce && mtk_dp->train_info.cable_plugged_in) msleep(100); @@ -1994,9 +1995,28 @@ static irqreturn_t mtk_dp_hpd_event_thread(int hpd, void *dev) memset(&mtk_dp->info.audio_cur_cfg, 0, sizeof(mtk_dp->info.audio_cur_cfg)); + mtk_dp->enabled = false; + /* power off aux */ + mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE, + DP_PWR_STATE_BANDGAP_TPLL, + DP_PWR_STATE_MASK); + mtk_dp->need_debounce = false; mod_timer(&mtk_dp->debounce_timer, jiffies + msecs_to_jiffies(100) - 1); + } else { + mtk_dp_aux_panel_poweron(mtk_dp, true); + + ret = mtk_dp_parse_capabilities(mtk_dp); + if (ret) + drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n"); + + /* Training */ + ret = mtk_dp_training(mtk_dp); + if (ret) + drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret); + + mtk_dp->enabled = true; } } @@ -2162,16 +2182,6 @@ static const struct drm_edid *mtk_dp_edid_read(struct drm_bridge *bridge, drm_edid = drm_edid_read_ddc(connector, &mtk_dp->aux.ddc); - /* - * Parse capability here to let atomic_get_input_bus_fmts and - * mode_valid use the capability to calculate sink bitrates. - */ - if (mtk_dp_parse_capabilities(mtk_dp)) { - drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n"); - drm_edid_free(drm_edid); - drm_edid = NULL; - } - if (drm_edid) { /* * FIXME: get rid of drm_edid_raw() @@ -2365,13 +2375,6 @@ static void mtk_dp_bridge_atomic_enable(struct drm_bridge *bridge, mtk_dp_aux_panel_poweron(mtk_dp, true); - /* Training */ - ret = mtk_dp_training(mtk_dp); - if (ret) { - drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret); - goto power_off_aux; - } - ret = mtk_dp_video_config(mtk_dp); if (ret) goto power_off_aux; @@ -2389,7 +2392,6 @@ static void mtk_dp_bridge_atomic_enable(struct drm_bridge *bridge, sizeof(mtk_dp->info.audio_cur_cfg)); } - mtk_dp->enabled = true; mtk_dp_update_plugged_status(mtk_dp); return; @@ -2404,7 +2406,6 @@ static void mtk_dp_bridge_atomic_disable(struct drm_bridge *bridge, { struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge); - mtk_dp->enabled = false; mtk_dp_update_plugged_status(mtk_dp); mtk_dp_video_enable(mtk_dp, false); mtk_dp_audio_mute(mtk_dp, true);