diff mbox series

[1/2] dt-bindings: iio: Correct indentation and style in DTS example

Message ID 20250324125313.82226-1-krzysztof.kozlowski@linaro.org (mailing list archive)
State New
Headers show
Series [1/2] dt-bindings: iio: Correct indentation and style in DTS example | expand

Commit Message

Krzysztof Kozlowski March 24, 2025, 12:53 p.m. UTC 
DTS example in the bindings should be indented with 2- or 4-spaces and
aligned with opening '- |', so correct any differences like 3-spaces or
mixtures 2- and 4-spaces in one binding.

No functional changes here, but saves some comments during reviews of
new patches built on existing code.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../bindings/iio/adc/st,stm32-adc.yaml        | 102 +++++++++---------
 1 file changed, 51 insertions(+), 51 deletions(-)

Comments

Jonathan Cameron March 28, 2025, 9:44 a.m. UTC | #1 
On Mon, 24 Mar 2025 13:53:12 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:

> DTS example in the bindings should be indented with 2- or 4-spaces and
> aligned with opening '- |', so correct any differences like 3-spaces or
> mixtures 2- and 4-spaces in one binding.
> 
> No functional changes here, but saves some comments during reviews of
> new patches built on existing code.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Applied both patches to my testing branch. I'll rebase on rc1 once
that is available and push out as togreg.

Thanks,

Jonathan
> ---
>  .../bindings/iio/adc/st,stm32-adc.yaml        | 102 +++++++++---------
>  1 file changed, 51 insertions(+), 51 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
> index ef9dcc365eab..17bb60e18a1c 100644
> --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
> @@ -498,7 +498,7 @@ patternProperties:
>  examples:
>    - |
>      // Example 1: with stm32f429, ADC1, single-ended channel 8
> -      adc123: adc@40012000 {
> +    adc123: adc@40012000 {
>          compatible = "st,stm32f4-adc-core";
>          reg = <0x40012000 0x400>;
>          interrupts = <18>;
> @@ -512,28 +512,28 @@ examples:
>          #address-cells = <1>;
>          #size-cells = <0>;
>          adc@0 {
> -          compatible = "st,stm32f4-adc";
> -          #io-channel-cells = <1>;
> -          reg = <0x0>;
> -          clocks = <&rcc 0 168>;
> -          interrupt-parent = <&adc123>;
> -          interrupts = <0>;
> -          st,adc-channels = <8>;
> -          dmas = <&dma2 0 0 0x400 0x0>;
> -          dma-names = "rx";
> -          assigned-resolution-bits = <8>;
> +            compatible = "st,stm32f4-adc";
> +            #io-channel-cells = <1>;
> +            reg = <0x0>;
> +            clocks = <&rcc 0 168>;
> +            interrupt-parent = <&adc123>;
> +            interrupts = <0>;
> +            st,adc-channels = <8>;
> +            dmas = <&dma2 0 0 0x400 0x0>;
> +            dma-names = "rx";
> +            assigned-resolution-bits = <8>;
>          };
>          // ...
>          // other adc child nodes follow...
> -      };
> +    };
>  
>    - |
>      // Example 2: with stm32mp157c to setup ADC1 with:
>      // - channels 0 & 1 as single-ended
>      // - channels 2 & 3 as differential (with resp. 6 & 7 negative inputs)
> -      #include <dt-bindings/interrupt-controller/arm-gic.h>
> -      #include <dt-bindings/clock/stm32mp1-clks.h>
> -      adc12: adc@48003000 {
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/stm32mp1-clks.h>
> +    adc12: adc@48003000 {
>          compatible = "st,stm32mp1-adc-core";
>          reg = <0x48003000 0x400>;
>          interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
> @@ -550,27 +550,27 @@ examples:
>          #address-cells = <1>;
>          #size-cells = <0>;
>          adc@0 {
> -          compatible = "st,stm32mp1-adc";
> -          #io-channel-cells = <1>;
> -          reg = <0x0>;
> -          interrupt-parent = <&adc12>;
> -          interrupts = <0>;
> -          st,adc-channels = <0 1>;
> -          st,adc-diff-channels = <2 6>, <3 7>;
> -          st,min-sample-time-nsecs = <5000>;
> -          dmas = <&dmamux1 9 0x400 0x05>;
> -          dma-names = "rx";
> +            compatible = "st,stm32mp1-adc";
> +            #io-channel-cells = <1>;
> +            reg = <0x0>;
> +            interrupt-parent = <&adc12>;
> +            interrupts = <0>;
> +            st,adc-channels = <0 1>;
> +            st,adc-diff-channels = <2 6>, <3 7>;
> +            st,min-sample-time-nsecs = <5000>;
> +            dmas = <&dmamux1 9 0x400 0x05>;
> +            dma-names = "rx";
>          };
>          // ...
>          // other adc child node follow...
> -      };
> +    };
>  
>    - |
>      // Example 3: with stm32mp157c to setup ADC2 with:
>      // - internal channels 13, 14, 15.
> -      #include <dt-bindings/interrupt-controller/arm-gic.h>
> -      #include <dt-bindings/clock/stm32mp1-clks.h>
> -      adc122: adc@48003000 {
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/stm32mp1-clks.h>
> +    adc122: adc@48003000 {
>          compatible = "st,stm32mp1-adc-core";
>          reg = <0x48003000 0x400>;
>          interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
> @@ -587,28 +587,28 @@ examples:
>          #address-cells = <1>;
>          #size-cells = <0>;
>          adc@100 {
> -          compatible = "st,stm32mp1-adc";
> -          #io-channel-cells = <1>;
> -          reg = <0x100>;
> -          interrupts = <1>;
> -          #address-cells = <1>;
> -          #size-cells = <0>;
> -          channel@13 {
> -            reg = <13>;
> -            label = "vrefint";
> -            st,min-sample-time-ns = <9000>;
> -          };
> -          channel@14 {
> -            reg = <14>;
> -            label = "vddcore";
> -            st,min-sample-time-ns = <9000>;
> -          };
> -          channel@15 {
> -            reg = <15>;
> -            label = "vbat";
> -            st,min-sample-time-ns = <9000>;
> -          };
> +            compatible = "st,stm32mp1-adc";
> +            #io-channel-cells = <1>;
> +            reg = <0x100>;
> +            interrupts = <1>;
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            channel@13 {
> +                reg = <13>;
> +                label = "vrefint";
> +                st,min-sample-time-ns = <9000>;
> +            };
> +            channel@14 {
> +                reg = <14>;
> +                label = "vddcore";
> +                st,min-sample-time-ns = <9000>;
> +            };
> +            channel@15 {
> +                reg = <15>;
> +                label = "vbat";
> +                st,min-sample-time-ns = <9000>;
> +            };
>          };
> -      };
> +    };
>  
>  ...
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
index ef9dcc365eab..17bb60e18a1c 100644
--- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
@@ -498,7 +498,7 @@  patternProperties:
 examples:
   - |
     // Example 1: with stm32f429, ADC1, single-ended channel 8
-      adc123: adc@40012000 {
+    adc123: adc@40012000 {
         compatible = "st,stm32f4-adc-core";
         reg = <0x40012000 0x400>;
         interrupts = <18>;
@@ -512,28 +512,28 @@  examples:
         #address-cells = <1>;
         #size-cells = <0>;
         adc@0 {
-          compatible = "st,stm32f4-adc";
-          #io-channel-cells = <1>;
-          reg = <0x0>;
-          clocks = <&rcc 0 168>;
-          interrupt-parent = <&adc123>;
-          interrupts = <0>;
-          st,adc-channels = <8>;
-          dmas = <&dma2 0 0 0x400 0x0>;
-          dma-names = "rx";
-          assigned-resolution-bits = <8>;
+            compatible = "st,stm32f4-adc";
+            #io-channel-cells = <1>;
+            reg = <0x0>;
+            clocks = <&rcc 0 168>;
+            interrupt-parent = <&adc123>;
+            interrupts = <0>;
+            st,adc-channels = <8>;
+            dmas = <&dma2 0 0 0x400 0x0>;
+            dma-names = "rx";
+            assigned-resolution-bits = <8>;
         };
         // ...
         // other adc child nodes follow...
-      };
+    };
 
   - |
     // Example 2: with stm32mp157c to setup ADC1 with:
     // - channels 0 & 1 as single-ended
     // - channels 2 & 3 as differential (with resp. 6 & 7 negative inputs)
-      #include <dt-bindings/interrupt-controller/arm-gic.h>
-      #include <dt-bindings/clock/stm32mp1-clks.h>
-      adc12: adc@48003000 {
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/stm32mp1-clks.h>
+    adc12: adc@48003000 {
         compatible = "st,stm32mp1-adc-core";
         reg = <0x48003000 0x400>;
         interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -550,27 +550,27 @@  examples:
         #address-cells = <1>;
         #size-cells = <0>;
         adc@0 {
-          compatible = "st,stm32mp1-adc";
-          #io-channel-cells = <1>;
-          reg = <0x0>;
-          interrupt-parent = <&adc12>;
-          interrupts = <0>;
-          st,adc-channels = <0 1>;
-          st,adc-diff-channels = <2 6>, <3 7>;
-          st,min-sample-time-nsecs = <5000>;
-          dmas = <&dmamux1 9 0x400 0x05>;
-          dma-names = "rx";
+            compatible = "st,stm32mp1-adc";
+            #io-channel-cells = <1>;
+            reg = <0x0>;
+            interrupt-parent = <&adc12>;
+            interrupts = <0>;
+            st,adc-channels = <0 1>;
+            st,adc-diff-channels = <2 6>, <3 7>;
+            st,min-sample-time-nsecs = <5000>;
+            dmas = <&dmamux1 9 0x400 0x05>;
+            dma-names = "rx";
         };
         // ...
         // other adc child node follow...
-      };
+    };
 
   - |
     // Example 3: with stm32mp157c to setup ADC2 with:
     // - internal channels 13, 14, 15.
-      #include <dt-bindings/interrupt-controller/arm-gic.h>
-      #include <dt-bindings/clock/stm32mp1-clks.h>
-      adc122: adc@48003000 {
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/stm32mp1-clks.h>
+    adc122: adc@48003000 {
         compatible = "st,stm32mp1-adc-core";
         reg = <0x48003000 0x400>;
         interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -587,28 +587,28 @@  examples:
         #address-cells = <1>;
         #size-cells = <0>;
         adc@100 {
-          compatible = "st,stm32mp1-adc";
-          #io-channel-cells = <1>;
-          reg = <0x100>;
-          interrupts = <1>;
-          #address-cells = <1>;
-          #size-cells = <0>;
-          channel@13 {
-            reg = <13>;
-            label = "vrefint";
-            st,min-sample-time-ns = <9000>;
-          };
-          channel@14 {
-            reg = <14>;
-            label = "vddcore";
-            st,min-sample-time-ns = <9000>;
-          };
-          channel@15 {
-            reg = <15>;
-            label = "vbat";
-            st,min-sample-time-ns = <9000>;
-          };
+            compatible = "st,stm32mp1-adc";
+            #io-channel-cells = <1>;
+            reg = <0x100>;
+            interrupts = <1>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+            channel@13 {
+                reg = <13>;
+                label = "vrefint";
+                st,min-sample-time-ns = <9000>;
+            };
+            channel@14 {
+                reg = <14>;
+                label = "vddcore";
+                st,min-sample-time-ns = <9000>;
+            };
+            channel@15 {
+                reg = <15>;
+                label = "vbat";
+                st,min-sample-time-ns = <9000>;
+            };
         };
-      };
+    };
 
 ...