| Message ID | 20250328134208.2183653-2-daniel.lezcano@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/2] dt-bindings: timer: Add NXP System Timer Module | expand |
On 28/03/2025 14:42, Daniel Lezcano wrote: > Add the System Timer Module description found on the NXP s32 platform > and the compatible for the s32g2 variant. > > Cc: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Cc: Thomas Fossati <thomas.fossati@linaro.org> > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> > --- I got only this patch, no cover letter, no changelog. What happened here? > .../bindings/timer/nxp,stm-timer.yaml | 50 +++++++++++++++++++ > 1 file changed, 50 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml > > diff --git a/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml b/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml > new file mode 100644 > index 000000000000..a9c0151d62be > --- /dev/null > +++ b/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml Filename following compatible. > @@ -0,0 +1,50 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/timer/nxp,stm-timer.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP System Timer Module (STM) > + > +maintainers: > + - Daniel Lezcano <daniel.lezcano@kernel.org> > + > +description: > + The System Timer Module supports commonly required system and application > + software timing functions. STM includes a 32-bit count-up timer and four > + 32-bit compare channels with a separate interrupt source for each channel. > + The timer is driven by the STM module clock divided by an 8-bit prescale > + value. > + > +properties: > + compatible: > + enum: > + - nxp,s32g-stm Previously it was told to me there is no such soc as s32g but they are named differently, e.g. s32g2. See other bindings. Please consult internally and come with one unified approach to all NXP bindings. Otherwise, if this is a real soc, fix this for top level compatibles, because there is no s32g there either. This applies to all NXP-related patches (which I am sure was previously discussed on the lists). What is confusing: previous compatible was correct and I did not ask to change it. Best regards, Krzysztof
On 29/03/2025 06:03, Krzysztof Kozlowski wrote: > On 28/03/2025 14:42, Daniel Lezcano wrote: >> Add the System Timer Module description found on the NXP s32 platform >> and the compatible for the s32g2 variant. >> >> Cc: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com> >> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> Cc: Thomas Fossati <thomas.fossati@linaro.org> >> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> >> --- > > I got only this patch, no cover letter, no changelog. What happened here? My bad, my scripts needs some more work :) Will Cc you in the next version >> .../bindings/timer/nxp,stm-timer.yaml | 50 +++++++++++++++++++ >> 1 file changed, 50 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml >> >> diff --git a/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml b/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml >> new file mode 100644 >> index 000000000000..a9c0151d62be >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml > > Filename following compatible. > >> @@ -0,0 +1,50 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/timer/nxp,stm-timer.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: NXP System Timer Module (STM) >> + >> +maintainers: >> + - Daniel Lezcano <daniel.lezcano@kernel.org> >> + >> +description: >> + The System Timer Module supports commonly required system and application >> + software timing functions. STM includes a 32-bit count-up timer and four >> + 32-bit compare channels with a separate interrupt source for each channel. >> + The timer is driven by the STM module clock divided by an 8-bit prescale >> + value. >> + >> +properties: >> + compatible: >> + enum: >> + - nxp,s32g-stm > > Previously it was told to me there is no such soc as s32g but they are > named differently, e.g. s32g2. See other bindings. > > Please consult internally and come with one unified approach to all NXP > bindings. Otherwise, if this is a real soc, fix this for top level > compatibles, because there is no s32g there either. > > This applies to all NXP-related patches (which I am sure was previously > discussed on the lists). > > What is confusing: previous compatible was correct and I did not ask to > change it. Yeah, I think the answer is straightforward. It is s32g2 and s32g3, the two platforms having the STM. I'll will fix the compatibles.
diff --git a/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml b/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml new file mode 100644 index 000000000000..a9c0151d62be --- /dev/null +++ b/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/nxp,stm-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP System Timer Module (STM) + +maintainers: + - Daniel Lezcano <daniel.lezcano@kernel.org> + +description: + The System Timer Module supports commonly required system and application + software timing functions. STM includes a 32-bit count-up timer and four + 32-bit compare channels with a separate interrupt source for each channel. + The timer is driven by the STM module clock divided by an 8-bit prescale + value. + +properties: + compatible: + enum: + - nxp,s32g-stm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + timer@4011c000 { + compatible = "nxp,s32g-stm"; + reg = <0x4011c000 0x3000>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 0x3b>; + };
Add the System Timer Module description found on the NXP s32 platform and the compatible for the s32g2 variant. Cc: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Thomas Fossati <thomas.fossati@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> --- .../bindings/timer/nxp,stm-timer.yaml | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml