From patchwork Tue Apr 1 12:00:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 14034739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64DDCC36018 for ; Tue, 1 Apr 2025 12:07:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=o7/T3sf3jpGKfR+4icO6FEly9G75XxZVn1GSMSgzrDI=; b=HQ0KlnROpPoi4y6WVpHa+KN3SQ rtVr4Is98yo7fiezi4KXxBoKLmjIcrATP67XQxgrS+ga63mIgcQsrfa/h9oVlmYYRE4mXSHYfcLLJ bHnLO0s6ISCHiuj12LSd+c2pfaOiJbbnrQ7az05oR+lnEkOHIcjf8hEqtnB9SiROUpvIsA2Xz66kq fTBl972S1kuleR7bU1ZAHsyQ8JLoBe8V/ekw01JBIFT671jxyRA0VX0l+eBm2bz4hdzmW1k7fHydb 9ebnqlcRtlblyTSy0h/KEua7zUkImRBIhvqnnh+7pCnGSqthecGY5kobvkjx65OAiawR6qwj9GqU0 hWxP7FiA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.1 #2 (Red Hat Linux)) id 1tzaOw-00000002vqX-47fE; Tue, 01 Apr 2025 12:07:30 +0000 Received: from mail-m49197.qiye.163.com ([45.254.49.197]) by bombadil.infradead.org with esmtps (Exim 4.98.1 #2 (Red Hat Linux)) id 1tzaI8-00000002sQP-2Tuy; Tue, 01 Apr 2025 12:00:30 +0000 Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c00:430:ae31:3177:4f09:da96]) by smtp.qiye.163.com (Hmail) with ESMTP id 1053fa3f0; Tue, 1 Apr 2025 20:00:25 +0800 (GMT+08:00) From: Chukun Pan To: Heiko Stuebner Cc: Yao Zi , Rob Herring , Chukun Pan , Jonas Karlman , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 1/2] arm64: dts: rockchip: Add pwm nodes for RK3528 Date: Tue, 1 Apr 2025 20:00:19 +0800 Message-Id: <20250401120020.976343-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250401120020.976343-1-amadeus@jmu.edu.cn> References: <20250401120020.976343-1-amadeus@jmu.edu.cn> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlCGUJOVkpJSEhMSkIYGBhLTFYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJT0seQUgZSEFJGEtLQU9IS0EaHkhKQUhKTExBTx1LQkEfGkJNWVdZFhoPEh UdFFlBWU9LSFVKS0hKTkxOVUpLS1VKQktLWQY+ X-HM-Tid: 0a95f13964c103a2kunm1053fa3f0 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6OjI6Fjo4HjJICwoUTD0pMBI2 DiNPCjZVSlVKTE9ITktDQ0lNS0NNVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0tBT0hLQRoeSEpBSEpMTEFPHUtCQR8aQk1ZV1kIAVlBSENITzcG X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250401_050028_858314_8B18CA51 X-CRM114-Status: UNSURE ( 9.15 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add pwm nodes for RK3528. The PWM core on RK3528 is the same as RK3328, but the driver does not support interrupts yet. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 80 ++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 35704d0be37a..47d4f63f11d3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -465,6 +465,86 @@ uart7: serial@ffa28000 { status = "disabled"; }; + pwm0: pwm@ffa90000 { + compatible = "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg = <0x0 0xffa90000 0x0 0x10>; + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; + clock-names = "pwm", "pclk"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm1: pwm@ffa90010 { + compatible = "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg = <0x0 0xffa90010 0x0 0x10>; + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; + clock-names = "pwm", "pclk"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm2: pwm@ffa90020 { + compatible = "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg = <0x0 0xffa90020 0x0 0x10>; + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; + clock-names = "pwm", "pclk"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm3: pwm@ffa90030 { + compatible = "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg = <0x0 0xffa90030 0x0 0x10>; + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; + clock-names = "pwm", "pclk"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm4: pwm@ffa98000 { + compatible = "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg = <0x0 0xffa98000 0x0 0x10>; + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names = "pwm", "pclk"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm5: pwm@ffa98010 { + compatible = "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg = <0x0 0xffa98010 0x0 0x10>; + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names = "pwm", "pclk"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm6: pwm@ffa98020 { + compatible = "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg = <0x0 0xffa98020 0x0 0x10>; + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names = "pwm", "pclk"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm7: pwm@ffa98030 { + compatible = "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg = <0x0 0xffa98030 0x0 0x10>; + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names = "pwm", "pclk"; + #pwm-cells = <3>; + status = "disabled"; + }; + saradc: adc@ffae0000 { compatible = "rockchip,rk3528-saradc"; reg = <0x0 0xffae0000 0x0 0x10000>;