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Fri, 04 Apr 2025 07:35:27 -0700 (PDT) Received: from localhost.localdomain ([50.212.55.90]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7c76e735419sm224204585a.15.2025.04.04.07.35.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Apr 2025 07:35:27 -0700 (PDT) From: Ben Wolsieffer To: linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Maxime Coquelin , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Rob Herring , Ben Wolsieffer Subject: [PATCH] ARM: dts: stm32: add low power timer on STM32F746 Date: Fri, 4 Apr 2025 10:35:14 -0400 Message-ID: <20250404143514.860126-1-ben.wolsieffer@hefring.com> X-Mailer: git-send-email 2.48.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250404_073529_985939_CB58AE75 X-CRM114-Status: GOOD ( 11.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add device tree node for the low power timer on the STM32F746. Signed-off-by: Ben Wolsieffer --- arch/arm/boot/dts/st/stm32f746.dtsi | 34 +++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi index 2537b3d47e6f..208f8c6dfc9d 100644 --- a/arch/arm/boot/dts/st/stm32f746.dtsi +++ b/arch/arm/boot/dts/st/stm32f746.dtsi @@ -43,6 +43,7 @@ #include "../armv7-m.dtsi" #include #include +#include / { #address-cells = <1>; @@ -245,6 +246,39 @@ pwm { }; }; + lptimer1: timer@40002400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x40002400 0x400>; + interrupts-extended = <&exti 23 IRQ_TYPE_EDGE_RISING>; + clocks = <&rcc 1 CLK_LPTIMER>; + clock-names = "mux"; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + status = "disabled"; + }; + + trigger@0 { + compatible = "st,stm32-lptimer-trigger"; + reg = <0>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-lptimer-counter"; + status = "disabled"; + }; + + timer { + compatible = "st,stm32-lptimer-timer"; + status = "disabled"; + }; + }; + rtc: rtc@40002800 { compatible = "st,stm32-rtc"; reg = <0x40002800 0x400>;