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Mon, 7 Apr 2025 13:19:17 -0700 From: Nicolin Chen To: , CC: , , , , , , , , Subject: [PATCH rc v2] iommu/tegra241-cmdqv: Fix warnings due to dmam_free_coherent() Date: Mon, 7 Apr 2025 13:19:08 -0700 Message-ID: <20250407201908.172225-1-nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099D3:EE_|PH0PR12MB5630:EE_ X-MS-Office365-Filtering-Correlation-Id: 70b8e63e-b884-4be9-d844-08dd7611849a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700013|1800799024|13003099007; X-Microsoft-Antispam-Message-Info: retCluH7arx1ZeObrJa7k3rB4T3dOzaaLMKwr6xKptZgBWntoZXiQ5iUgX9OKUsXylsaXjNtPJ1su3DrE4rGgIZEjlTgyp5KoejpXZ8HWM7UAezh0rJF3RaPRfjYTjrK5Go5/E+hbcWAdGoABy1py1SrkaUndVsMROjTHyzNm5LcYtzocKML3UecWCi1bgk+vZF11JaDksG5uEIQaVxDnZsJPQ1qmZe+Fiu4xCp8z40+OhRk0eo/VLUh3l5FghjhWeYojJRJY/DKsIS99Dzm+l1A8Cvj2U446DMFdxlqMSuHrHfkrr3KSQedKSUjnPk+RHXA2mMZHNO3nyngBEHAQyP6sheiisYy9zIuXtuavFXFAfMi2pF3TeuELtC6UDTPv3pooSZHRTDAb4eE3dZ4ZSMlEZi56YLEuDIhOp5dgSpk0CunjY1BnPBePTiM9m8g2dLzW33cnE/fedqbbv+J9sSKQJVnYE+km5CdUodaXmhFnLaqPldpFiWq+tO4DK+4BOyi8sysAjL1RiUaAtbY1W6w0ZaOPFHnKFVuqYH/ptm6NS1dfAEXkEQDLe4AOBeuwsGefjyumnYMpC8EYIaicB4IjzNpjJ7imIMtQ9N4qpiXdP/yxWrfabjPrB1U9YyX6ZW/lIanYOyga8RWdGVo8DDVC7AwRHWRY1zSnDscRIxIJkibHHqDOip4ErJSYTr8FmCME2HaT8/C3iqREoesosReW0eAnspfjVGS2ikgqHzu6SdZYXZGkiSxPv1ZY8tfKhTG4rUJPaljsPpk5t6L7xuTMcj9huzUA1sYpC6STbsBKrr6qhT01Nk3cOi/PZpZeBbzru9r/qNWYPfhpxHUfBwxYkDq8wqP61UVfwHv/XuO/GSGuYzYPtUW1WLJEq571PDfgz2y4g0YRuW/R+wjkdFhjelbzS6sp3D3FlxBFkL+Kzdcbrj9ovQKELm7kx6R+mUroFEHWA7B+/lzw9Bu8xFkgc2jCJ9JLj2h9SXLm46CgIN6aBwElk5lV7eCBFIIwG6xg7tSL04TgFFM+P3sNuP7Q6345cDq7STT+cVJj3Z0Nt2pe82ounUzFfhBoH3Hgx4UqHkopdWYkhkH+rwAEjH5FNYm5VQEZqAhC3kFvcnXpHTMhv4ZRxrUUAn9bpGsUgZQtEaCZw/BaGICl4O3rRCYyMHV/zmEph8LlRR8HvqpQyIbNveBEea69uw8wEbDhQtzjNfVzv0gfhFG4REPioBshlUrDfFVm3f+yLYwWLoDImLP91a58eVhPFZzr/vn6R3ajEfjAmm99FimfKYN/ZXCcTaNJnsMzspX1glT0Tcm8AeNQkEeL7bFGOkYvS8pQdjsRQsRDLDH+gr4z+7N7gaE202dX92TjKluuEye2neOiH1dxEUIbYxiGDKWvmR8Zcfio6OdAP5+Z7WKIMCKb6Y9LqSAafq4vF+9Db58UnXyMc/PCdkOv9bhFwZXLLoZnKv+oMa8IN6VrGErwoL6gL9V2z4g//u4YK994r7aBxE= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700013)(1800799024)(13003099007);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Apr 2025 20:19:36.6334 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70b8e63e-b884-4be9-d844-08dd7611849a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D3.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5630 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250407_131948_284974_FC042C4C X-CRM114-Status: GOOD ( 15.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Two WARNINGs are observed when SMMU driver rolls back upon failure: arm-smmu-v3.9.auto: Failed to register iommu arm-smmu-v3.9.auto: probe with driver arm-smmu-v3 failed with error -22 ------------[ cut here ]------------ WARNING: CPU: 5 PID: 1 at kernel/dma/mapping.c:74 dmam_free_coherent+0xc0/0xd8 Call trace: dmam_free_coherent+0xc0/0xd8 (P) tegra241_vintf_free_lvcmdq+0x74/0x188 tegra241_cmdqv_remove_vintf+0x60/0x148 tegra241_cmdqv_remove+0x48/0xc8 arm_smmu_impl_remove+0x28/0x60 devm_action_release+0x1c/0x40 ------------[ cut here ]------------ 128 pages are still in use! WARNING: CPU: 16 PID: 1 at mm/page_alloc.c:6902 free_contig_range+0x18c/0x1c8 Call trace: free_contig_range+0x18c/0x1c8 (P) cma_release+0x154/0x2f0 dma_free_contiguous+0x38/0xa0 dma_direct_free+0x10c/0x248 dma_free_attrs+0x100/0x290 dmam_free_coherent+0x78/0xd8 tegra241_vintf_free_lvcmdq+0x74/0x160 tegra241_cmdqv_remove+0x98/0x198 arm_smmu_impl_remove+0x28/0x60 devm_action_release+0x1c/0x40 This is because the LVCMDQ queue memory are managed by devres, while that dmam_free_coherent() is called in the context of devm_action_release(). Jason pointed out that "arm_smmu_impl_probe() has mis-ordered the devres callbacks if ops->device_remove() is going to be manually freeing things that probe allocated": https://lore.kernel.org/linux-iommu/20250407174408.GB1722458@nvidia.com/ In fact, tegra241_cmdqv_init_structures() only allocates memory resources which means any failure that it generates would be similar to -ENOMEM, so there is no point in having that "falling back to standard SMMU" routine, as the standard SMMU would likely fail to allocate memory too. Remove the unwind part in tegra241_cmdqv_init_structures(), and return a proper error code to ask SMMU driver to call tegra241_cmdqv_remove() via impl_ops->device_remove(). Then, drop tegra241_vintf_free_lvcmdq() since devres will take care of that. Fixes: 483e0bd8883a ("iommu/tegra241-cmdqv: Do not allocate vcmdq until dma_set_mask_and_coherent") Cc: stable@vger.kernel.org Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- Changelog v2 * Fail tegra241_cmdqv_init_structures() and let devres take care of the lvcmdq queue memory space v1 https://lore.kernel.org/all/cover.1744014481.git.nicolinc@nvidia.com/ .../iommu/arm/arm-smmu-v3/tegra241-cmdqv.c | 32 +++---------------- 1 file changed, 5 insertions(+), 27 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c index d525ab43a4ae..dd7d030d2e89 100644 --- a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c +++ b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c @@ -487,17 +487,6 @@ static int tegra241_cmdqv_hw_reset(struct arm_smmu_device *smmu) /* VCMDQ Resource Helpers */ -static void tegra241_vcmdq_free_smmu_cmdq(struct tegra241_vcmdq *vcmdq) -{ - struct arm_smmu_queue *q = &vcmdq->cmdq.q; - size_t nents = 1 << q->llq.max_n_shift; - size_t qsz = nents << CMDQ_ENT_SZ_SHIFT; - - if (!q->base) - return; - dmam_free_coherent(vcmdq->cmdqv->smmu.dev, qsz, q->base, q->base_dma); -} - static int tegra241_vcmdq_alloc_smmu_cmdq(struct tegra241_vcmdq *vcmdq) { struct arm_smmu_device *smmu = &vcmdq->cmdqv->smmu; @@ -560,7 +549,8 @@ static void tegra241_vintf_free_lvcmdq(struct tegra241_vintf *vintf, u16 lidx) struct tegra241_vcmdq *vcmdq = vintf->lvcmdqs[lidx]; char header[64]; - tegra241_vcmdq_free_smmu_cmdq(vcmdq); + /* Note that the lvcmdq queue memory space is managed by devres */ + tegra241_vintf_deinit_lvcmdq(vintf, lidx); dev_dbg(vintf->cmdqv->dev, @@ -768,13 +758,13 @@ static int tegra241_cmdqv_init_structures(struct arm_smmu_device *smmu) vintf = kzalloc(sizeof(*vintf), GFP_KERNEL); if (!vintf) - goto out_fallback; + return -ENOMEM; /* Init VINTF0 for in-kernel use */ ret = tegra241_cmdqv_init_vintf(cmdqv, 0, vintf); if (ret) { dev_err(cmdqv->dev, "failed to init vintf0: %d\n", ret); - goto free_vintf; + return ret; } /* Preallocate logical VCMDQs to VINTF0 */ @@ -783,24 +773,12 @@ static int tegra241_cmdqv_init_structures(struct arm_smmu_device *smmu) vcmdq = tegra241_vintf_alloc_lvcmdq(vintf, lidx); if (IS_ERR(vcmdq)) - goto free_lvcmdq; + return PTR_ERR(vcmdq); } /* Now, we are ready to run all the impl ops */ smmu->impl_ops = &tegra241_cmdqv_impl_ops; return 0; - -free_lvcmdq: - for (lidx--; lidx >= 0; lidx--) - tegra241_vintf_free_lvcmdq(vintf, lidx); - tegra241_cmdqv_deinit_vintf(cmdqv, vintf->idx); -free_vintf: - kfree(vintf); -out_fallback: - dev_info(smmu->impl_dev, "Falling back to standard SMMU CMDQ\n"); - smmu->options &= ~ARM_SMMU_OPT_TEGRA241_CMDQV; - tegra241_cmdqv_remove(smmu); - return 0; } #ifdef CONFIG_IOMMU_DEBUGFS