| Message ID | 20250408-gicv5-host-v1-16-1f26db465f8d@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Arm GICv5: Host driver implementation | expand |
On Tue, Apr 08, 2025 at 12:50:15PM +0200, Lorenzo Pieralisi wrote: > Implement the GCIE capability as a strict boot cpu capability to > detect whether architectural GICv5 support is available in HW. > > Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> > Cc: Will Deacon <will@kernel.org> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Marc Zyngier <maz@kernel.org> This looks good; I have a minor consistency/bikeshedding concern below. > --- > arch/arm64/kernel/cpufeature.c | 7 +++++++ > arch/arm64/tools/cpucaps | 1 + > 2 files changed, 8 insertions(+) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 9c4d6d552b25cb3a31d1fb267bd73d3f82513e69..8c60591633f3d435ad9b80a10e484f26af328964 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -3041,6 +3041,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > .matches = has_pmuv3, > }, > #endif > + { > + .desc = "GCIE", > + .type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE, > + .capability = ARM64_HAS_GCIE, > + .matches = has_cpuid_feature, > + ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, GCIE, IMP) > + }, I reckon it's worth making the desc a bit clearer, e.g. "GICv5 CPU interface". It might be worth cleaning up the existing ARM64_HAS_GIC_CPUIF_SYSREGS feature, e.g. making that have "GICv3 CPU interface" as its desc. Likewise, could make the names consistent, e.g. have: ARM64_HAS_GICV3_CPUIF ARM64_HAS_GICV5_CPUIF ... ? Mark.
On Tue, Apr 08, 2025 at 12:26:11PM +0100, Mark Rutland wrote: > On Tue, Apr 08, 2025 at 12:50:15PM +0200, Lorenzo Pieralisi wrote: > > Implement the GCIE capability as a strict boot cpu capability to > > detect whether architectural GICv5 support is available in HW. > > > > Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> > > Cc: Will Deacon <will@kernel.org> > > Cc: Catalin Marinas <catalin.marinas@arm.com> > > Cc: Marc Zyngier <maz@kernel.org> > > This looks good; I have a minor consistency/bikeshedding concern below. > > > --- > > arch/arm64/kernel/cpufeature.c | 7 +++++++ > > arch/arm64/tools/cpucaps | 1 + > > 2 files changed, 8 insertions(+) > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 9c4d6d552b25cb3a31d1fb267bd73d3f82513e69..8c60591633f3d435ad9b80a10e484f26af328964 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -3041,6 +3041,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > > .matches = has_pmuv3, > > }, > > #endif > > + { > > + .desc = "GCIE", > > + .type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE, > > + .capability = ARM64_HAS_GCIE, > > + .matches = has_cpuid_feature, > > + ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, GCIE, IMP) > > + }, > > I reckon it's worth making the desc a bit clearer, e.g. "GICv5 CPU > interface". > > It might be worth cleaning up the existing ARM64_HAS_GIC_CPUIF_SYSREGS > feature, e.g. making that have "GICv3 CPU interface" as its desc. > > Likewise, could make the names consistent, e.g. have: > > ARM64_HAS_GICV3_CPUIF > ARM64_HAS_GICV5_CPUIF > > ... ? This makes sense to me, I will do it in preparation for v2. Thanks, Lorenzo
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9c4d6d552b25cb3a31d1fb267bd73d3f82513e69..8c60591633f3d435ad9b80a10e484f26af328964 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -3041,6 +3041,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = has_pmuv3, }, #endif + { + .desc = "GCIE", + .type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE, + .capability = ARM64_HAS_GCIE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, GCIE, IMP) + }, {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 772c1b008e437ed34cedb1c0f663c4dcea8f6759..e87e4bc2501f6b86352c03bd35adf33c160a577c 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -29,6 +29,7 @@ HAS_EVT HAS_FPMR HAS_FGT HAS_FPSIMD +HAS_GCIE HAS_GCS HAS_GENERIC_AUTH HAS_GENERIC_AUTH_ARCH_QARMA3
Implement the GCIE capability as a strict boot cpu capability to detect whether architectural GICv5 support is available in HW. Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Cc: Will Deacon <will@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Marc Zyngier <maz@kernel.org> --- arch/arm64/kernel/cpufeature.c | 7 +++++++ arch/arm64/tools/cpucaps | 1 + 2 files changed, 8 insertions(+)