| Message ID | 20250410062826.3344545-4-ping.bai@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add i.MX943 basic dts support | expand |
Hi, Am Donnerstag, 10. April 2025, 08:28:26 CEST schrieb Jacky Bai: > Add the minimal board dts support for i.MX943 EVK. Only the > console uart, SD & eMMC are enabled for linux basic boot. > > Signed-off-by: Jacky Bai <ping.bai@nxp.com> > Reviewed-by: Frank Li <Frank.Li@nxp.com> > --- > - v5 changes: > - remove the unused and not documented 'fsl,cd-gpio-wakeup-disable' > property from usdhc node. > > - v4 changes: > - no > > - v3 changes: > - no > > - v2 changes: > - newly added for board dts > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > arch/arm64/boot/dts/freescale/imx943-evk.dts | 195 +++++++++++++++++++ > 2 files changed, 196 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx943-evk.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index b6d3fe26d621..2fe86fc6d73a 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -303,6 +303,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb Uh, please sort the entries alphabetically, thus imx94 goes before imx95. > > imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo > > diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts > new file mode 100644 > index 000000000000..b0bb08bb67d5 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts > @@ -0,0 +1,195 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright 2024-2025 NXP > + */ > + > +/dts-v1/; > + > +#include "imx943.dtsi" > + > +/ { > + compatible = "fsl,imx943-evk", "fsl,imx94"; > + model = "NXP i.MX943 EVK board"; > + > + aliases { > + mmc0 = &usdhc1; > + mmc1 = &usdhc2; > + serial0 = &lpuart1; > + }; > + > + chosen { > + stdout-path = &lpuart1; > + }; > + > + reg_usdhc2_vmmc: regulator-usdhc2 { > + compatible = "regulator-fixed"; > + off-on-delay-us = <12000>; > + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; > + pinctrl-names = "default"; > + regulator-max-microvolt = <3300000>; > + regulator-min-microvolt = <3300000>; > + regulator-name = "VDD_SD2_3V3"; > + gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + reserved-memory { > + ranges; > + #address-cells = <2>; > + #size-cells = <2>; > + > + linux,cma { > + compatible = "shared-dma-pool"; > + alloc-ranges = <0 0x80000000 0 0x7f000000>; > + reusable; > + size = <0 0x10000000>; > + linux,cma-default; > + }; > + }; > + > + memory@80000000 { > + reg = <0x0 0x80000000 0x0 0x80000000>; > + device_type = "memory"; > + }; > +}; > + > +&lpuart1 { > + pinctrl-0 = <&pinctrl_uart1>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&scmi_iomuxc { > + pinctrl_uart1: uart1grp { > + fsl,pins = < > + IMX94_PAD_UART1_TXD__LPUART1_TX 0x31e > + IMX94_PAD_UART1_RXD__LPUART1_RX 0x31e > + >; > + }; > + > + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { > + fsl,pins = < > + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x158e > + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x138e > + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x138e > + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x138e > + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x138e > + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x138e > + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x138e > + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x138e > + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x138e > + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x138e > + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x158e > + >; > + }; > + > + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { > + fsl,pins = < > + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x15fe > + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x13fe > + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe > + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe > + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe > + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe > + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe > + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe > + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe > + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe > + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe > + >; > + }; > + > + pinctrl_usdhc1: usdhc1grp { > + fsl,pins = < > + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x158e > + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x138e > + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x138e > + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x138e > + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x138e > + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x138e > + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x138e > + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x138e > + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x138e > + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x138e > + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x158e > + >; > + }; > + > + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { > + fsl,pins = < > + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x158e > + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x138e > + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x138e > + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x138e > + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x138e > + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x138e > + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e > + >; > + }; > + > + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { > + fsl,pins = < > + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x15fe > + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x13fe > + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe > + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe > + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe > + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe > + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e > + >; > + }; > + > + pinctrl_usdhc2_gpio: usdhc2gpiogrp { > + fsl,pins = < > + IMX94_PAD_SD2_CD_B__GPIO4_IO20 0x31e > + >; > + }; > + > + pinctrl_usdhc2: usdhc2grp { > + fsl,pins = < > + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x158e > + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x138e > + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x138e > + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x138e > + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x138e > + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x138e > + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e > + >; > + }; > + > + pinctrl_reg_usdhc2_vmmc: usdhc2regvmmcgrp { > + fsl,pins = < > + IMX94_PAD_SD2_RESET_B__GPIO4_IO27 0x31e > + >; > + }; > +}; > + > +&usdhc1 { > + pinctrl-0 = <&pinctrl_usdhc1>; > + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; > + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; > + pinctrl-3 = <&pinctrl_usdhc1>; > + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; Is the sleep pinctrl necessary if it is the same as 'default'? > + bus-width = <8>; > + non-removable; > + no-sdio; > + no-sd; > + status = "okay"; > +}; > + > +&usdhc2 { > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; > + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; > + pinctrl-3 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; Same here. > + bus-width = <4>; > + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; > + vmmc-supply = <®_usdhc2_vmmc>; This is probably also 'no-mmc', no? Maybe even 'no-sdio'. Best regards, Alexander > + status = "okay"; > +}; > + > +&wdog3 { > + fsl,ext-reset-output; > + status = "okay"; > +}; >
> Subject: Re: [PATCH v5 3/3] arm64: dts: freescale: Add minimal dts support for > imx943 evk > > Hi, > > Am Donnerstag, 10. April 2025, 08:28:26 CEST schrieb Jacky Bai: > > Add the minimal board dts support for i.MX943 EVK. Only the console > > uart, SD & eMMC are enabled for linux basic boot. > > > > Signed-off-by: Jacky Bai <ping.bai@nxp.com> > > Reviewed-by: Frank Li <Frank.Li@nxp.com> > > --- > > - v5 changes: > > - remove the unused and not documented 'fsl,cd-gpio-wakeup-disable' > > property from usdhc node. > > > > - v4 changes: > > - no > > > > - v3 changes: > > - no > > > > - v2 changes: > > - newly added for board dts > > --- > > arch/arm64/boot/dts/freescale/Makefile | 1 + > > arch/arm64/boot/dts/freescale/imx943-evk.dts | 195 > > +++++++++++++++++++ > > 2 files changed, 196 insertions(+) > > create mode 100644 arch/arm64/boot/dts/freescale/imx943-evk.dts > > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile > > b/arch/arm64/boot/dts/freescale/Makefile > > index b6d3fe26d621..2fe86fc6d73a 100644 > > --- a/arch/arm64/boot/dts/freescale/Makefile > > +++ b/arch/arm64/boot/dts/freescale/Makefile > > @@ -303,6 +303,7 @@ dtb-$(CONFIG_ARCH_MXC) += > > imx93-tqma9352-mba93xxla.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb > > +dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb > > Uh, please sort the entries alphabetically, thus imx94 goes before imx95. > Ok > > > > imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb > imx8mm-kontron-dl.dtbo > > > > diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts > > b/arch/arm64/boot/dts/freescale/imx943-evk.dts > > new file mode 100644 > > index 000000000000..b0bb08bb67d5 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts ... > > +&usdhc1 { > > + pinctrl-0 = <&pinctrl_usdhc1>; > > + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; > > + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; > > + pinctrl-3 = <&pinctrl_usdhc1>; > > + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; > > Is the sleep pinctrl necessary if it is the same as 'default'? > Currently not necessary, I can drop it. > > + bus-width = <8>; > > + non-removable; > > + no-sdio; > > + no-sd; > > + status = "okay"; > > +}; > > + > > +&usdhc2 { > > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > > + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; > > + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; > > + pinctrl-3 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > > + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; > > Same here. > > > + bus-width = <4>; > > + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; > > + vmmc-supply = <®_usdhc2_vmmc>; > > This is probably also 'no-mmc', no? Maybe even 'no-sdio'. > This slot is used for SD card, will update it as you suggested in next version. Thx. BR > Best regards, > Alexander > > > + status = "okay"; > > +}; > > + > > +&wdog3 { > > + fsl,ext-reset-output; > > + status = "okay"; > > +}; > > > > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq-g/ > roup.com%2F&data=05%7C02%7Cping.bai%40nxp.com%7Cb24c8157d23c4d95 > b9a508dd77fb70f0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63 > 8798643991989017%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRyd > WUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D% > 3D%7C0%7C%7C%7C&sdata=wtlbuuuZBHYRvl7SF0GGH5CPI2oFGSURWSG6ZZ4 > EBqg%3D&reserved=0 >
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index b6d3fe26d621..2fe86fc6d73a 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -303,6 +303,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb +dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts new file mode 100644 index 000000000000..b0bb08bb67d5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts @@ -0,0 +1,195 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2024-2025 NXP + */ + +/dts-v1/; + +#include "imx943.dtsi" + +/ { + compatible = "fsl,imx943-evk", "fsl,imx94"; + model = "NXP i.MX943 EVK board"; + + aliases { + mmc0 = &usdhc1; + mmc1 = &usdhc2; + serial0 = &lpuart1; + }; + + chosen { + stdout-path = &lpuart1; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + off-on-delay-us = <12000>; + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; + pinctrl-names = "default"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "VDD_SD2_3V3"; + gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reserved-memory { + ranges; + #address-cells = <2>; + #size-cells = <2>; + + linux,cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x80000000 0 0x7f000000>; + reusable; + size = <0 0x10000000>; + linux,cma-default; + }; + }; + + memory@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + device_type = "memory"; + }; +}; + +&lpuart1 { + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&scmi_iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + IMX94_PAD_UART1_TXD__LPUART1_TX 0x31e + IMX94_PAD_UART1_RXD__LPUART1_RX 0x31e + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = < + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x158e + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x138e + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x138e + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x138e + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x138e + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x138e + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x138e + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x138e + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x138e + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x138e + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x158e + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = < + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x15fe + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x13fe + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + IMX94_PAD_SD1_CLK__USDHC1_CLK 0x158e + IMX94_PAD_SD1_CMD__USDHC1_CMD 0x138e + IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x138e + IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x138e + IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x138e + IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x138e + IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x138e + IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x138e + IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x138e + IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x138e + IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x158e + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = < + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x158e + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x138e + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x138e + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x138e + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x138e + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x138e + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = < + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x15fe + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x13fe + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = < + IMX94_PAD_SD2_CD_B__GPIO4_IO20 0x31e + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + IMX94_PAD_SD2_CLK__USDHC2_CLK 0x158e + IMX94_PAD_SD2_CMD__USDHC2_CMD 0x138e + IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x138e + IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x138e + IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x138e + IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x138e + IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_reg_usdhc2_vmmc: usdhc2regvmmcgrp { + fsl,pins = < + IMX94_PAD_SD2_RESET_B__GPIO4_IO27 0x31e + >; + }; +}; + +&usdhc1 { + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + pinctrl-3 = <&pinctrl_usdhc1>; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + bus-width = <8>; + non-removable; + no-sdio; + no-sd; + status = "okay"; +}; + +&usdhc2 { + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-3 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + bus-width = <4>; + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_usdhc2_vmmc>; + status = "okay"; +}; + +&wdog3 { + fsl,ext-reset-output; + status = "okay"; +};