@@ -306,6 +306,52 @@ codec_audio: sound {
clock-names = "cpb-mcasp-auxclk", "cpb-mcasp-auxclk-48000",
"cpb-codec-scki", "cpb-codec-scki-48000";
};
+
+ vsys_io_1v8: regulator-vsys-io-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_io_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_io_1v2: regulator-vsys-io-1v2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_io_1v2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ edp1_refclk: clock-edp1-refclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <19200000>;
+ };
+
+ dp1_pwr_3v3: regulator-dp1-prw {
+ compatible = "regulator-fixed";
+ regulator-name = "dp1-pwr";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&exp4 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ dp1: connector-dp1 {
+ compatible = "dp-connector";
+ label = "DP1";
+ type = "full-size";
+ dp-pwr-supply = <&dp1_pwr_3v3>;
+
+ port {
+ dp1_connector_in: endpoint {
+ remote-endpoint = <&dp1_out>;
+ };
+ };
+ };
};
&wkup_gpio0 {
@@ -1345,12 +1391,24 @@ &mhdp {
};
&dss_ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
/* DP */
- port {
+ port@0 {
+ reg = <0>;
dpi0_out: endpoint {
remote-endpoint = <&dp0_in>;
};
};
+
+ /* DSI */
+ port@2 {
+ reg = <2>;
+ dpi2_out: endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
};
&main_i2c4 {
@@ -1365,6 +1423,63 @@ exp4: gpio@20 {
gpio-controller;
#gpio-cells = <2>;
};
+
+ dsi_edp_bridge: dsi-edp-bridge@2c {
+ compatible = "ti,sn65dsi86";
+ reg = <0x2c>;
+
+ clock-names = "refclk";
+ clocks = <&edp1_refclk>;
+
+ enable-gpios = <&exp4 2 GPIO_ACTIVE_HIGH>;
+
+ vpll-supply = <&vsys_io_1v8>;
+ vccio-supply = <&vsys_io_1v8>;
+ vcca-supply = <&vsys_io_1v2>;
+ vcc-supply = <&vsys_io_1v2>;
+
+ dsi_edp_bridge_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ dp1_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dp1_out: endpoint {
+ remote-endpoint = <&dp1_connector_in>;
+ };
+ };
+ };
+ };
+};
+
+&dsi0_ports {
+ port@0 {
+ reg = <0>;
+ dsi0_out: endpoint {
+ remote-endpoint = <&dp1_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi0_in: endpoint {
+ remote-endpoint = <&dpi2_out>;
+ };
+ };
+};
+
+&dphy_tx0 {
+ status = "okay";
+};
+
+&dsi0 {
+ status = "okay";
};
&dp0_ports {
Enable DSI display for J784S4 EVM. Add DT node for DSI-to-eDP bridge. The DSI to eDP bridge is SN65DSI86 on the board. Add the endpoint nodes to describe connection from: DSS => DSI => SN65DSI86 bridge => DisplayPort-1 Set status for all required nodes for display as 'okay'. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> --- .../dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 117 +++++++++++++++++- 1 file changed, 116 insertions(+), 1 deletion(-)