| Message ID | 20250415-bxs-4-64-dts-v1-2-f7d3fa06625d@imgtec.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Imagination BXS-4-64 MC1 GPU support (DTS changes) | expand |
On Tue Apr 15, 2025 at 11:20 AM CDT, Matt Coster wrote: > The J721S2 binding is based on the TI downstream binding in commit > 54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1] > but with updated compatible strings. > > The clock[2] and power[3] indices were verified from docs, but the > source of the interrupt index remains elusive. > For future reference, interrupt maps are present in the TRM. "Table 6-89. GPU0 Hardware Requests" explicitly calls it out "GPU0 | GPU0_MISC_0_IRQ_0 | GIC500_SPI_IN_56 | COMPUTE_CLUSTER0 | GPU0 interrupt request". Subtract 32 from that pin number to get the DT number. That comment aside, this series seems fine to me. Reviewed-by: Randolph Sapp <rs@ti.com> > [1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel > [2]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html > [3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html > > Signed-off-by: Matt Coster <matt.coster@imgtec.com> > --- > This patch was previously sent as [DO NOT MERGE]: > https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-18-eda620c5865f@imgtec.com > --- > arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > index 92bf48fdbeba45ecca8c854db5f72fd3666239c5..a79ac41b2c1f51b7193e6133864428bd35a5e835 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > @@ -2048,4 +2048,16 @@ watchdog8: watchdog@23f0000 { > /* reserved for MAIN_R5F1_1 */ > status = "reserved"; > }; > + > + gpu: gpu@4e20000000 { > + compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue"; > + reg = <0x4e 0x20000000 0x00 0x80000>; > + clocks = <&k3_clks 130 1>; > + clock-names = "core"; > + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; > + power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>, > + <&k3_pds 373 TI_SCI_PD_EXCLUSIVE>; > + power-domain-names = "a", "b"; > + dma-coherent; > + }; > };
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 92bf48fdbeba45ecca8c854db5f72fd3666239c5..a79ac41b2c1f51b7193e6133864428bd35a5e835 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -2048,4 +2048,16 @@ watchdog8: watchdog@23f0000 { /* reserved for MAIN_R5F1_1 */ status = "reserved"; }; + + gpu: gpu@4e20000000 { + compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue"; + reg = <0x4e 0x20000000 0x00 0x80000>; + clocks = <&k3_clks 130 1>; + clock-names = "core"; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>, + <&k3_pds 373 TI_SCI_PD_EXCLUSIVE>; + power-domain-names = "a", "b"; + dma-coherent; + }; };
The J721S2 binding is based on the TI downstream binding in commit 54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1] but with updated compatible strings. The clock[2] and power[3] indices were verified from docs, but the source of the interrupt index remains elusive. [1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel [2]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html [3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html Signed-off-by: Matt Coster <matt.coster@imgtec.com> --- This patch was previously sent as [DO NOT MERGE]: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-18-eda620c5865f@imgtec.com --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)