From patchwork Tue Apr 15 05:44:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 14051531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45221C369B8 for ; Tue, 15 Apr 2025 05:54:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=J4FNARvOhkfZh98Pa90BJCmLDPGaUvjUkQw+6AWjTys=; b=ieDackFnmfsDiH/Zpzqexwg0QF eYQYfDYYljYtWSvxJkgibV4lDkuDANyLsKpRweJJPDBauYxFbow1P5g8m3JqNGikPLQR8cTNAdoBI paunBpWKjmuMLLl1XOQZM2j7nwQ4OZ9TCXu53rwuKwtwIEG3uyb4ZbimOm56XrN6SqCYwWYWoNw4V 4bQXdsnhem33wlaKpmZhXenfiC6a6GZ5rALQdHvtnDN0FTweJXveP2jWR0o7trnNdPdcFzs50wtoi +rgG4+AUR2+u0YTZjj/WxXialz788adYJU3EYvPR30axExR63iMHN56b/+0oI9+oNzyN16Cln/niG J9saTIkA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1u4ZFY-00000004bea-42Uu; Tue, 15 Apr 2025 05:54:24 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1u4Z6j-00000004aS0-0i95 for linux-arm-kernel@lists.infradead.org; Tue, 15 Apr 2025 05:45:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EE23315A1; Mon, 14 Apr 2025 22:45:12 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.49.104]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B630F3F66E; Mon, 14 Apr 2025 22:45:11 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Ryan Roberts , Catalin Marinas , Will Deacon , Marc Zyngier , kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, Anshuman Khandual Subject: [PATCH V2] arm64/mm: Implement pte_po_index() for permission overlay index Date: Tue, 15 Apr 2025 11:14:42 +0530 Message-Id: <20250415054442.2287891-1-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250414_224517_297743_07D603D0 X-CRM114-Status: GOOD ( 12.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Roberts Previously pte_access_permitted() used FIELD_GET() directly to retrieve the permission overlay index from the pte. However, FIELD_GET() doesn't work for 128 bit quanitites. Since we are about to add support for D128 pgtables, let's create a specific helper, pte_po_index() which can do the required mask and shift regardless of the data type width. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.linux.dev Cc: linux-kernel@vger.kernel.org Signed-off-by: Ryan Roberts Signed-off-by: Anshuman Khandual --- This patch applies on v6.15-rc2 Changes in V2: - Replaced FIELD_GET() in compute_s1_overlay_permissions() per Ryan Changes in V1: https://lore.kernel.org/linux-arm-kernel/20250410052021.1533180-1-anshuman.khandual@arm.com/ arch/arm64/include/asm/pgtable-hwdef.h | 1 + arch/arm64/include/asm/pgtable-prot.h | 2 ++ arch/arm64/include/asm/pgtable.h | 2 +- arch/arm64/kvm/at.c | 2 +- 4 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index f3b77deedfa2..028a164924df 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -211,6 +211,7 @@ #define PTE_PO_IDX_2 (_AT(pteval_t, 1) << 62) #define PTE_PO_IDX_MASK GENMASK_ULL(62, 60) +#define PTE_PO_IDX_SHIFT 60 /* diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h index 7830d031742e..b53bc241e4e7 100644 --- a/arch/arm64/include/asm/pgtable-prot.h +++ b/arch/arm64/include/asm/pgtable-prot.h @@ -136,6 +136,8 @@ static inline bool __pure lpa2_is_enabled(void) ((pte & BIT(PTE_PI_IDX_1)) >> (PTE_PI_IDX_1 - 1)) | \ ((pte & BIT(PTE_PI_IDX_0)) >> (PTE_PI_IDX_0 - 0))) +#define pte_po_index(pte) ((pte_val(pte) & PTE_PO_IDX_MASK) >> PTE_PO_IDX_SHIFT) + /* * Page types used via Permission Indirection Extension (PIE). PIE uses * the USER, DBM, PXN and UXN bits to to generate an index which is used diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index d3b538be1500..41979c0e6c21 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -182,7 +182,7 @@ static inline bool por_el0_allows_pkey(u8 pkey, bool write, bool execute) (((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER)) && (!(write) || pte_write(pte))) #define pte_access_permitted(pte, write) \ (pte_access_permitted_no_overlay(pte, write) && \ - por_el0_allows_pkey(FIELD_GET(PTE_PO_IDX_MASK, pte_val(pte)), write, false)) + por_el0_allows_pkey(pte_po_index(pte), write, false)) #define pmd_access_permitted(pmd, write) \ (pte_access_permitted(pmd_pte(pmd), (write))) #define pud_access_permitted(pud, write) \ diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c index f74a66ce3064..66bee3f2d7c2 100644 --- a/arch/arm64/kvm/at.c +++ b/arch/arm64/kvm/at.c @@ -1073,7 +1073,7 @@ static void compute_s1_overlay_permissions(struct kvm_vcpu *vcpu, { u8 idx, pov_perms, uov_perms; - idx = FIELD_GET(PTE_PO_IDX_MASK, wr->desc); + idx = pte_po_index(__pte(wr->desc)); switch (wi->regime) { case TR_EL10: