| Message ID | 204aef78-cf5b-a337-af71-5d52ba845aa0@huawei.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/2] arm64: mm: Rename asid2idx() to ctxid2asid() | expand |
Delete the first blank line and add your SOB, For series, Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com> On 2021/12/8 17:17, Yunfeng Ye wrote: > The commit 95b54c3e4c92 ("KVM: arm64: Add feature register flag > definitions") introduce the ID_AA64MMFR0_ASID_8 and ID_AA64MMFR0_ASID_16 > macros. > > We can use these macros for cheanup in get_cpu_asid_bits(). > > No functional change. > --- > arch/arm64/mm/context.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c > index bbc2708fe928..b8b4cf0bcf39 100644 > --- a/arch/arm64/mm/context.c > +++ b/arch/arm64/mm/context.c > @@ -50,10 +50,10 @@ static u32 get_cpu_asid_bits(void) > pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n", > smp_processor_id(), fld); > fallthrough; > - case 0: > + case ID_AA64MMFR0_ASID_8: > asid = 8; > break; > - case 2: > + case ID_AA64MMFR0_ASID_16: > asid = 16; > } >
On 2021/12/8 17:35, Kefeng Wang wrote: > Delete the first blank line and add your SOB, > Ok, thanks. > For series, > > Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com> > > On 2021/12/8 17:17, Yunfeng Ye wrote: >> The commit 95b54c3e4c92 ("KVM: arm64: Add feature register flag >> definitions") introduce the ID_AA64MMFR0_ASID_8 and ID_AA64MMFR0_ASID_16 >> macros. >> >> We can use these macros for cheanup in get_cpu_asid_bits(). >> >> No functional change. >> --- >> arch/arm64/mm/context.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c >> index bbc2708fe928..b8b4cf0bcf39 100644 >> --- a/arch/arm64/mm/context.c >> +++ b/arch/arm64/mm/context.c >> @@ -50,10 +50,10 @@ static u32 get_cpu_asid_bits(void) >> pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n", >> smp_processor_id(), fld); >> fallthrough; >> - case 0: >> + case ID_AA64MMFR0_ASID_8: >> asid = 8; >> break; >> - case 2: >> + case ID_AA64MMFR0_ASID_16: >> asid = 16; >> } >> > . >
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index bbc2708fe928..b8b4cf0bcf39 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -50,10 +50,10 @@ static u32 get_cpu_asid_bits(void) pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n", smp_processor_id(), fld); fallthrough; - case 0: + case ID_AA64MMFR0_ASID_8: asid = 8; break; - case 2: + case ID_AA64MMFR0_ASID_16: asid = 16; }
The commit 95b54c3e4c92 ("KVM: arm64: Add feature register flag definitions") introduce the ID_AA64MMFR0_ASID_8 and ID_AA64MMFR0_ASID_16 macros. We can use these macros for cheanup in get_cpu_asid_bits(). No functional change. --- arch/arm64/mm/context.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)