From patchwork Tue Oct 6 23:05:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 7340601 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 62E49BEEA4 for ; Tue, 6 Oct 2015 23:08:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D464A20546 for ; Tue, 6 Oct 2015 23:08:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D0F7620544 for ; Tue, 6 Oct 2015 23:08:22 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZjbJB-0004UW-TH; Tue, 06 Oct 2015 23:06:09 +0000 Received: from mail-la0-f54.google.com ([209.85.215.54]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZjbJ8-0004N0-Ew for linux-arm-kernel@lists.infradead.org; Tue, 06 Oct 2015 23:06:07 +0000 Received: by lacwq3 with SMTP id wq3so221020lac.0 for ; Tue, 06 Oct 2015 16:05:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:mime-version:content-transfer-encoding:content-type; bh=e7fC3HSdvE4nRqTFRA18UyXKiMsUJ7MPiX50IrrHNto=; b=kVusHiXjf2QOpI0JBse3klW/yobL1hxkmJCkuxnoc13YCYucmUvPd4g9JTRI8RRzzi CNVhRx6og4+LI9Azm0J7yHYIt1+3n1rVHX9YCwEEUG2UrN9BNvKreZI6LVpr7Ny5hR7Y 735+3z7MdjzEPcn9xyhMmsf8JhdVzfyycgyo582mKdxmdbtqMqe59q/s0gkob5C8ea1l Hdce0Io6RASP54Fh7X6mh5aszIxMTiyVlkKMyVi+YC4c2Sl76bwK+ePCvI0JgEbm6jID j2pFb+oQCjytBq2ZWnFmf4cqLGOnF9kx5HUEY5+HElpu9XZoK/9d3ueP7rQ87Ch+JYDP atJQ== X-Gm-Message-State: ALoCoQl/MZ35jZd2Kyg22pHe40WCXhnq1sQQj635/7Ci8ZPHGSC8yd5rhhwgIz3xyRZdo9+6KrF3 X-Received: by 10.25.168.16 with SMTP id r16mr10582960lfe.54.1444172743644; Tue, 06 Oct 2015 16:05:43 -0700 (PDT) Received: from wasted.cogentembedded.com (ppp18-102.pppoe.mtu-net.ru. [81.195.18.102]) by smtp.gmail.com with ESMTPSA id z204sm5752712lfd.1.2015.10.06.16.05.42 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Oct 2015 16:05:42 -0700 (PDT) From: Sergei Shtylyov To: horms@verge.net.au, linux-sh@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org Subject: [PATCH] ARM: shmobile: porter: add SDHI0/2 DT support Date: Wed, 07 Oct 2015 02:05:41 +0300 Message-ID: <2228837.DO5U5OvRSi@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.9 (Linux/4.1.7-100.fc21.x86_64; KDE/4.14.9; x86_64; ; ) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151006_160606_698754_756A770F X-CRM114-Status: GOOD ( 13.47 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux@arm.linux.org.uk, magnus.damm@gmail.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Define the Porter board dependent part of the SDHI0/2 device nodes along with the necessary voltage regulators (note that the Vcc regulators are dummy -- they are required but don't actually exist on the board). Also, GPIOs have to be used for the CD and WP signals due to the SDHI driver constraints... This patch is analogous to the commit 1299df03d719 (ARM: shmobile: henninger: add SDHI0/2 DT support) as there are no differences between those boards in this respect. Signed-off-by: Sergei Shtylyov --- This patch is against the 'renesas-devel-20151006-v4.3-rc4' tag of Simon Horman's 'renesas.git' repo. arch/arm/boot/dts/r8a7791-porter.dts | 76 +++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7791-porter.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7791-porter.dts +++ renesas/arch/arm/boot/dts/r8a7791-porter.dts @@ -10,6 +10,7 @@ /dts-v1/; #include "r8a7791.dtsi" +#include / { model = "Porter"; @@ -33,6 +34,50 @@ device_type = "memory"; reg = <2 0x00000000 0 0x40000000>; }; + + vcc_sdhi0: regulator@0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi0: regulator@1 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi2: regulator@2 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI2 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi2: regulator@3 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI2 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &extal_clk { @@ -54,6 +99,16 @@ renesas,groups = "intc_irq0"; renesas,function = "intc"; }; + + sdhi0_pins: sd0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; + renesas,function = "sdhi0"; + }; + + sdhi2_pins: sd2 { + renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; + renesas,function = "sdhi2"; + }; }; &scif0 { @@ -78,3 +133,24 @@ micrel,led-mode = <1>; }; }; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&sdhi2 { + pinctrl-0 = <&sdhi2_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi2>; + vqmmc-supply = <&vccq_sdhi2>; + cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; + status = "okay"; +};