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Mon, 29 Apr 2024 21:44:09 -0700 From: Nicolin Chen To: , CC: , , , , , , , , Subject: [PATCH v6 4/6] iommu/arm-smmu-v3: Make __arm_smmu_cmdq_skip_err reusable Date: Mon, 29 Apr 2024 21:43:47 -0700 Message-ID: <25150aec77edf5590bca81f4a418ef1ee7b21952.1714451595.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001507:EE_|IA0PR12MB8713:EE_ X-MS-Office365-Filtering-Correlation-Id: 28fe10a3-34c9-4bc1-fac6-08dc68d03167 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|82310400014|1800799015|376005; X-Microsoft-Antispam-Message-Info: n/Kdb8WXVZNRMTCZX90cr9RQCNTw2j8IdvHEYrn9cbkETUtc1SdErT78EoNBIsHWIJL4PeF2Jm0QcnhkCydHEi5v1t/FdDhvGcaRVTHY0Du5uv+SYK9GISFT1LEiqkXceAUzEQsBsY3aGiHoeVcca/SbyZO65KuIJS98hFEAn9sQ0RQmBHadDOA4Ddynyq+2aafA7xRsc27umuStPasfIVxY8xyULG2GoSg7KH+X4b6R3l9oVvCttFsPWkKLQxgKCIEgIRhLACceujDYeOVHx5iL/so3u8CntOBm14D6noWSDbJOkHsx0wlcj/veqfIRj0nErLsKng73jG6d7S8KMQW9oxJilYN3GipG7+w5XmP7kn4W99ftgn4QTeK4sRlBsvxnIbZDyL97Mb9jUiLdDkORt6ARHcv9qc/eECX2c3fDLRLmRIsyivMR1yAxk63eXwis95937HvtihZabx4FpvY01x4n5+2kIqdnUJJVeuH7QlRTyRNkPMsBf7Ai7J6lnK/CW7uOoi6MPGcFQGM+dKuWUiZjVc/kQJNoYKdAys1Vb5H1QBTRRRiK1Owfd2cydfopv5J4CJOmSXyePmXxdAE5VltilvAhrSZz+jR7CZ1/3aD/19IvLvm/DuuRAXDsDVYa6+/T8al/uQWt2532G9LMN0S/KKFGrCr3cvsgVMwNlhJbVDZ7EZGeOidaCfOYvyZoXykHw0wfnd3OAcrHvM9rjsvGxD53a98Tz7fkgWWh/xyuZxuyU60awyeJ35qC4qGVlcypR3yod01aQm1ue/hBEtnIxbfnFbdD8ag8ncWIlvQTj27/h2IddccJDMl9YnJMx5dwDPzGdNjiMogNZp9Jr5NUxc0q15Ez5MwClocTf0p16yEmmAWgISqhARRoIibbDqU6wjLltwAPsmLvcPjOo2ANPxG02iQYESU73Fp1kUvCmz68ymCi+PFldSTxarXDf6XPLiIgKGMpSTu1iab0SAFgXMQ9CQzJTHO6Go2tRAieuR7vGuilEoLJQvijn9OVBU+N193WDgINs+QE9DBSEY/pDnxO7tZLMdFdOnrqAyQfB7qtTZzYY8xfeQN2Rxk0QAc4DDCcXBRDza2RMI0hR3KdrSXBjLu6KA5HlNwrWloHGtGLsA27hXwIXmbqrGwF6SI+QyadQ4r3Cbv65LhLsKm6EZ2cKmBabIgxFMWU53bijR2t3zbVkWZfG5L+rjxjmNuHK0JCjK/Oo31Ubj7JJGj5qVE7h0K/NLpsWCMIP4TLCjKP8KQP0aEeSbfVR4HT7x3LGwM9LRtuUlmo2yB3oyBuaIgMBGohSQH4xumUftPHIU7ToeZYIWXl0cJf5QhoHvTkEHhTcIv3sTuAfIfm+cGEd2Jo5XSO6qWc7rTW2xsjDWGjUgEuw3fE+dI/ X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(82310400014)(1800799015)(376005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2024 04:44:16.9902 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 28fe10a3-34c9-4bc1-fac6-08dc68d03167 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001507.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8713 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240429_214425_969708_21956D1F X-CRM114-Status: GOOD ( 12.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Allow __arm_smmu_cmdq_skip_err function to be reused by NVIDIA Tegra241 CMDQV unit since it will use the same data structure for q. And include the CMDQ_QUIRK_SYNC_CS_NONE_ONLY quirk when inserting a CMD_SYNC. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 7 +++++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 ++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 538850059bdd..5111859347d5 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -379,8 +379,8 @@ static void arm_smmu_cmdq_build_sync_cmd(u64 *cmd, struct arm_smmu_device *smmu, arm_smmu_cmdq_build_cmd(cmd, &ent); } -static void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, - struct arm_smmu_queue *q) +void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, + struct arm_smmu_queue *q) { static const char * const cerror_str[] = { [CMDQ_ERR_CERROR_NONE_IDX] = "No error", @@ -428,6 +428,9 @@ static void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, for (i = 0; i < ARRAY_SIZE(cmd); ++i) dev_err(smmu->dev, "\t0x%016llx\n", (unsigned long long)cmd[i]); + if (q->quirks & CMDQ_QUIRK_SYNC_CS_NONE_ONLY) + cmd_sync.sync.cs_none = true; + /* Convert the erroneous command into a CMD_SYNC */ arm_smmu_cmdq_build_cmd(cmd, &cmd_sync); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index ab2824e46ac5..32e7fc5e1794 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -762,6 +762,8 @@ int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, int ssid, int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, struct arm_smmu_cmdq *cmdq); +void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, + struct arm_smmu_queue *q); #ifdef CONFIG_ARM_SMMU_V3_SVA bool arm_smmu_sva_supported(struct arm_smmu_device *smmu);