From patchwork Fri Oct 16 21:37:01 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 7421061 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A7DA39F302 for ; Fri, 16 Oct 2015 21:39:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BFF7D20616 for ; Fri, 16 Oct 2015 21:39:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DDFD62088B for ; Fri, 16 Oct 2015 21:39:00 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZnCgq-0005MG-1Z; Fri, 16 Oct 2015 21:37:28 +0000 Received: from mail-lf0-f47.google.com ([209.85.215.47]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZnCgn-0005HN-4o for linux-arm-kernel@lists.infradead.org; Fri, 16 Oct 2015 21:37:25 +0000 Received: by lffz202 with SMTP id z202so2863642lff.3 for ; Fri, 16 Oct 2015 14:37:02 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding:content-type; bh=B92WLux9Moq81AKJ/JPeq1Vf7s53+8ZCenWvli3kYRk=; b=DDb0AvlMYeRXIlBWK3s8UoQ+W6Yv8lNgX2dwfvbEcvWoEhviBrxEudrhVlI2L2lPGS fUAqqlTOyYtoenA4djaykl5ejoLU94f9O3bo1lgwi063ALaeuBnN+zm8l//w++ri1n6q sG4uTAIbXQ821pXMkNsSWogxM4o6YF6Ku5hUahHmWaebbrxJi+GxKRQvWYcd92F48R2u 7DEQ/nxcLsJZQKruxIHrpp6BHE7XHzDTaZCOnoq7gWN78TP4HgXmbJcYIMkys+ZnXo96 PmFZ1ihRzzsMdqCg1SRUjXKagpkgKRacwT0IV79p4jsse4R/835mI//n2uCp9AaaZTkg CP/A== X-Gm-Message-State: ALoCoQmm0jZP3fVng/MhaNm8jTj/Y4gv0r8wNtnyTVkML4eJAE43lmwqsZTtwpIPOh/p4fxeSHdm X-Received: by 10.25.163.133 with SMTP id m127mr6177042lfe.121.1445031422249; Fri, 16 Oct 2015 14:37:02 -0700 (PDT) Received: from wasted.cogentembedded.com (ppp83-237-249-26.pppoe.mtu-net.ru. [83.237.249.26]) by smtp.gmail.com with ESMTPSA id pm6sm3146521lbc.1.2015.10.16.14.37.01 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Oct 2015 14:37:01 -0700 (PDT) Date: Fri, 16 Oct 2015 14:37:01 -0700 (PDT) X-Google-Original-Date: Sat, 17 Oct 2015 00:37 +0300 From: Sergei Shtylyov To: horms@verge.net.au, linux-sh@vger.kernel.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org Subject: [PATCH v2] ARM: shmobile: silk: add SDHI1 DT support Message-ID: <2544073.SzFGJq3XZ1@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.9 (Linux/4.1.8-100.fc21.x86_64; KDE/4.14.9; x86_64; ; ) In-Reply-To: <10037494.4LD4T2QGPX@wasted.cogentembedded.com> References: <10037494.4LD4T2QGPX@wasted.cogentembedded.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151016_143725_390086_3CD7EDE3 X-CRM114-Status: GOOD ( 11.92 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux@arm.linux.org.uk, magnus.damm@gmail.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Define the SILK board dependent part of the SDHI1 (connected to micro-SD slot) device nodes along with the necessary voltage regulators. Based on the original patch by Vladimir Barinov . Signed-off-by: Sergei Shtylyov --- This patch is against 'renesas-devel-20151015-v4.3-rc5' tag of Simon Horman's 'renesas.git' repo. Changes in version 3: - removed the "disable-wp" property; - added empty line before the regulator nodes; - reformatted the changelog; - refreshed the patch. Changes in version 2: - removed non-working SDHI0 stuff, renamed the patch; - replaced SDHI1's "wp-gpios" property with "disable-wp". arch/arm/boot/dts/r8a7794-silk.dts | 40 +++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7794-silk.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7794-silk.dts +++ renesas/arch/arm/boot/dts/r8a7794-silk.dts @@ -12,6 +12,7 @@ /dts-v1/; #include "r8a7794.dtsi" +#include / { model = "SILK"; @@ -39,6 +40,30 @@ regulator-boot-on; regulator-always-on; }; + + vcc_sdhi1: regulator@3 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI1 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi1: regulator@4 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI1 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &extal_clk { @@ -71,6 +96,11 @@ renesas,function = "mmc"; }; + sdhi1_pins: sd1 { + renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; + renesas,function = "sdhi1"; + }; + qspi_pins: spi0 { renesas,groups = "qspi_ctrl", "qspi_data4"; renesas,function = "qspi"; @@ -147,6 +177,16 @@ status = "okay"; }; +&sdhi1 { + pinctrl-0 = <&sdhi1_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi1>; + vqmmc-supply = <&vccq_sdhi1>; + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &qspi { pinctrl-0 = <&qspi_pins>; pinctrl-names = "default";