From patchwork Mon Aug 27 15:34:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: HACHIMI Samir X-Patchwork-Id: 1377751 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id B6CC63FC71 for ; Mon, 27 Aug 2012 15:39:38 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T61My-0001r0-CV; Mon, 27 Aug 2012 15:36:52 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T61Mj-0001pS-5N for linux-arm-kernel@merlin.infradead.org; Mon, 27 Aug 2012 15:36:37 +0000 Received: from mail1.adetelgroup.com ([78.155.151.235]) by casper.infradead.org with smtp (Exim 4.76 #1 (Red Hat Linux)) id 1T61Mh-0007a2-51 for linux-arm-kernel@lists.infradead.org; Mon, 27 Aug 2012 15:36:36 +0000 Received: from mail.adetelgroup.com ([192.168.102.3]) by mail1.adetelgroup.com with Microsoft SMTPSVC(6.0.3790.1830); Mon, 27 Aug 2012 17:35:39 +0200 X-MimeOLE: Produced By Microsoft Exchange V6.5 Received: from 192.168.130.56 ([192.168.130.56]) by frontmail.adetel.com ([192.168.102.3]) with Microsoft Exchange Server HTTP-DAV ; Mon, 27 Aug 2012 15:35:36 +0000 MIME-Version: 1.0 In-Reply-To: <1346081672-27866-1-git-send-email-shachimi@adeneo-embedded.com> X-Mailer: git-send-email 1.7.1 Content-class: urn:content-classes:message Subject: [PATCH v2 1/2] imx6q: pwm: Add device tree support Date: Mon, 27 Aug 2012 17:34:31 +0200 Message-ID: <3465D313FDFB824F9A9C8CD24FA4F6BCB4ACFD@frontmail.adetel.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCH v2 1/2] imx6q: pwm: Add device tree support thread-index: Ac2EaZrzUFvZL6CJROCk9I0kUowCXA== References: <1346081672-27866-1-git-send-email-shachimi@adeneo-embedded.com> From: "HACHIMI Samir" To: , X-OriginalArrivalTime: 27 Aug 2012 15:35:39.0058 (UTC) FILETIME=[9C323120:01CD8469] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20120827_163635_301623_676CAB63 X-CRM114-Status: UNSURE ( 9.77 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on casper.infradead.org summary: Content analysis details: (-1.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: s.hauer@pengutronix.de, HACHIMI Samir , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Samir Hachimi Add clock look-up for pwm. Add the pinmux support for pwm. Several pin can be set to PwmO for the same Pwm. Signed-off-by: Samir Hachimi --- arch/arm/boot/dts/imx6q.dtsi | 68 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 68 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 925da33..346ae9c 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -268,23 +268,43 @@ }; pwm@02080000 { /* PWM1 */ + compatible = "fsl,imx6q-pwm"; + #pwm-cells = <2>; reg = <0x02080000 0x4000>; interrupts = <0 83 0x04>; + clocks = <&clks 145>; + clock-names = "pwm"; + status = "disabled"; }; pwm@02084000 { /* PWM2 */ + compatible = "fsl,imx6q-pwm"; + #pwm-cells = <2>; reg = <0x02084000 0x4000>; interrupts = <0 84 0x04>; + clocks = <&clks 146>; + clock-names = "pwm"; + status = "disabled"; }; pwm@02088000 { /* PWM3 */ + compatible = "fsl,imx6q-pwm"; + #pwm-cells = <2>; reg = <0x02088000 0x4000>; interrupts = <0 85 0x04>; + clocks = <&clks 147>; + clock-names = "pwm"; + status = "disabled"; }; pwm@0208c000 { /* PWM4 */ + compatible = "fsl,imx6q-pwm"; + #pwm-cells = <2>; reg = <0x0208c000 0x4000>; interrupts = <0 86 0x04>; + clocks = <&clks 148>; + clock-names = "pwm"; + status = "disabled"; }; flexcan@02090000 { /* CAN1 */ @@ -584,6 +604,54 @@ }; }; + pwm1 { + pinctrl_pwm1_1: pwm1grp-1 { + fsl,pins = <1543 0x80000000>; /* MX6Q_PAD_SD1_DAT3__PWM1_PWMO */ + }; + + pinctrl_pwm1_2: pwm1grp-2 { + fsl,pins = <971 0x80000000>; /* MX6Q_PAD_GPIO_9__PWM1_PWMO */ + }; + + pinctrl_pwm1_3: pwm1grp-3 { + fsl,pins = <574 0x80000000>; /* MX6Q_PAD_DISP0_DAT8__PWM1_PWMO */ + }; + }; + + pwm2 { + pinctrl_pwm2_1: pwm2grp-1 { + fsl,pins = <1557 0x80000000>; /* MX6Q_PAD_SD1_DAT2__PWM2_PWMO */ + }; + + pinctrl_pwm2_2: pwm2grp-2 { + fsl,pins = <963 0x80000000>; /* MX6Q_PAD_GPIO_1__PWM2_PWMO */ + }; + + pinctrl_pwm2_3: pwm2grp-3 { + fsl,pins = <582 0x80000000>; /* MX6Q_PAD_DISP0_DAT8__PWM2_PWMO */ + }; + }; + + pwm3 { + pinctrl_pwm3_1: pwm3grp-1 { + fsl,pins = <1471 0x80000000>; /* MX6Q_PAD_SD4_DAT1__PWM3_PWMO */ + }; + + pinctrl_pwm3_2: pwm3grp-2 { + fsl,pins = <1526 0x80000000>; /* MX6Q_PAD_SD1_DAT1__PWM3_PWMO */ + }; + }; + + pwm4 { + pinctrl_pwm4_1: pwm4grp-1 { + fsl,pins = <1479 0x80000000>; /* MX6Q_PAD_SD4_DAT2__PWM4_PWMO */ + }; + + pinctrl_pwm4_2: pwm4grp-2 { + fsl,pins = <1550 0x80000000>; /* MX6Q_PAD_SD1_CMD__PWM4_PWMO */ + }; + }; + usdhc3 { pinctrl_usdhc3_1: usdhc3grp-1 { fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */