From patchwork Fri Jun 20 10:44:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Stuebner X-Patchwork-Id: 4388171 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 72F31BEEAA for ; Fri, 20 Jun 2014 10:46:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 61DD720397 for ; Fri, 20 Jun 2014 10:46:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 482AE20351 for ; Fri, 20 Jun 2014 10:46:01 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WxwId-00033Q-E0; Fri, 20 Jun 2014 10:44:03 +0000 Received: from gloria.sntech.de ([95.129.55.99]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WxwIZ-0002ll-Bc for linux-arm-kernel@lists.infradead.org; Fri, 20 Jun 2014 10:44:01 +0000 Received: from ip9234425c.dynamic.kabel-deutschland.de ([146.52.66.92] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1WxwI6-00010I-Nv; Fri, 20 Jun 2014 12:43:30 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: [PATCH 2/2] clocksource: add rockchip-specific armv7-timer setup Date: Fri, 20 Jun 2014 12:44:49 +0200 Message-ID: <3807304.rhf3VZXZNa@diego> User-Agent: KMail/4.11.5 (Linux/3.13-1-amd64; KDE/4.11.3; x86_64; ; ) In-Reply-To: <70167479.zcs3JF0luJ@diego> References: <70167479.zcs3JF0luJ@diego> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140620_034359_567516_FDD2E624 X-CRM114-Status: GOOD ( 11.73 ) X-Spam-Score: -0.0 (/) Cc: Matthias Brugger , devicetree@vger.kernel.org, Arnd Bergmann , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The armv7-timer on Rockchip RK3288 SoCs needs an underlying timer to run. Therefore the special rockchip,rk3288-armv7-timer does this setup and then initializes the architected timer using the new locally exposed arch_timer_init. Suggested-by: Arnd Bergmann Signed-off-by: Heiko Stuebner --- .../bindings/arm/rockchip/armv7-timer.txt | 22 +++++++++ drivers/clocksource/Makefile | 1 + drivers/clocksource/rockchip_timer.c | 57 ++++++++++++++++++++++ 3 files changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rockchip/armv7-timer.txt create mode 100644 drivers/clocksource/rockchip_timer.c diff --git a/Documentation/devicetree/bindings/arm/rockchip/armv7-timer.txt b/Documentation/devicetree/bindings/arm/rockchip/armv7-timer.txt new file mode 100644 index 0000000..4c1950a --- /dev/null +++ b/Documentation/devicetree/bindings/arm/rockchip/armv7-timer.txt @@ -0,0 +1,22 @@ +Rockchip armv7-timer: +--------------------- + +The architected timer on rk3288 SoCs has special setup requirements, as +the cpu-timer block needs to supply the architected timer. + +Required node properties: +- compatible value : = "rockchip,rk3288-armv7-timer"; +- reg : physical base address and the size of the registers window + of the supplying timer block +- CP15 Timer node properties as described in bindings/arm/arch_timer.txt + +Example: + +architected-timer { + compatible = "rockchip,rk3288-armv7-timer"; + reg = <0xff810020 0x20>; + interrupts = , + , + ; + clock-frequency = <24000000>; +}; diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 800b130..cbad225 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_ARCH_MARCO) += timer-marco.o obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o obj-$(CONFIG_ARCH_MXS) += mxs_timer.o obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o +obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip_timer.o obj-$(CONFIG_ARCH_U300) += timer-u300.o obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o obj-$(CONFIG_SUN5I_HSTIMER) += timer-sun5i.o diff --git a/drivers/clocksource/rockchip_timer.c b/drivers/clocksource/rockchip_timer.c new file mode 100644 index 0000000..46c2146 --- /dev/null +++ b/drivers/clocksource/rockchip_timer.c @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2014 MundoReader S.L. + * Author: Heiko Stuebner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include "arm_arch_timer.h" + +#define TIMER_LOAD_COUNT0 0x00 +#define TIMER_LOAD_COUNT1 0x04 +#define TIMER_CURRENT_VALUE0 0x08 +#define TIMER_CURRENT_VALUE1 0x0c +#define TIMER_CONTROL_REG 0x10 +#define TIMER_INT_STATUS 0x18 + +#define TIMER_DISABLE (0 << 0) +#define TIMER_ENABLE (1 << 0) +#define TIMER_MODE_FREE_RUNNING (0 << 1) +#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) +#define TIMER_INT_MASK (0 << 2) +#define TIMER_INT_UNMASK (1 << 2) + +static __init void rk3288_arch_timer_init(struct device_node *np) +{ + void __iomem *reg_base; + + reg_base = of_io_request_and_map(np, 0, "rk3288-armv7-timer"); + if (!reg_base) { + pr_warn("%s: Can't get resource\n", __func__); + return; + } + + writel(TIMER_DISABLE, reg_base + TIMER_CONTROL_REG); + + writel(0xffffffff, reg_base + TIMER_LOAD_COUNT0); + writel(0xffffffff, reg_base + TIMER_LOAD_COUNT1); + + writel(TIMER_ENABLE | TIMER_MODE_FREE_RUNNING, + reg_base + TIMER_CONTROL_REG); + + arch_timer_init(np); +} +CLOCKSOURCE_OF_DECLARE(rk3288_arch_timer, "rockchip,rk3288-armv7-timer", + rk3288_arch_timer_init);