@@ -19,6 +19,7 @@
#include <linux/mfd/syscon.h>
#include <linux/msi.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_pci.h>
#include <linux/phy/phy.h>
@@ -26,6 +27,7 @@
#include <linux/regmap.h>
#include <linux/resource.h>
#include <linux/signal.h>
+#include <linux/ti-pvu.h>
#include "../../pci.h"
#include "pcie-designware.h"
@@ -111,6 +113,16 @@
#define PCI_DEVICE_ID_TI_AM654X 0xb00c
+#define KS_PCI_VIRTID 0
+
+#define PCIE_VMAP_xP_CTRL 0x0
+#define PCIE_VMAP_xP_REQID 0x4
+#define PCIE_VMAP_xP_VIRTID 0x8
+
+#define PCIE_VMAP_xP_CTRL_EN BIT(0)
+
+#define PCIE_VMAP_xP_VIRTID_VID_MASK 0xfff
+
struct ks_pcie_of_data {
enum dw_pcie_device_mode mode;
const struct dw_pcie_host_ops *host_ops;
@@ -1125,6 +1137,89 @@ static const struct of_device_id ks_pcie_of_match[] = {
{ },
};
+#ifdef CONFIG_TI_PVU
+static const char *ks_vmap_res[] = {"vmap_lp", "vmap_hp"};
+
+static int ks_init_restricted_dma(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct of_phandle_iterator it;
+ bool init_vmap = false;
+ struct resource phys;
+ struct resource *res;
+ void __iomem *base;
+ unsigned int n;
+ u32 val;
+ int err;
+
+ of_for_each_phandle(&it, err, dev->of_node, "memory-region",
+ NULL, 0) {
+ if (!of_device_is_compatible(it.node, "restricted-dma-pool"))
+ continue;
+
+ err = of_address_to_resource(it.node, 0, &phys);
+ if (err < 0) {
+ dev_err(dev, "failed to parse memory region %pOF: %d\n",
+ it.node, err);
+ continue;
+ }
+
+ err = ti_pvu_create_region(KS_PCI_VIRTID, &phys);
+ if (err < 0)
+ return err;
+
+ init_vmap = true;
+ }
+
+ if (init_vmap) {
+ for (n = 0; n < ARRAY_SIZE(ks_vmap_res); n++) {
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ ks_vmap_res[n]);
+ base = devm_pci_remap_cfg_resource(dev, res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ writel(0, base + PCIE_VMAP_xP_REQID);
+
+ val = readl(base + PCIE_VMAP_xP_VIRTID);
+ val &= ~PCIE_VMAP_xP_VIRTID_VID_MASK;
+ val |= KS_PCI_VIRTID;
+ writel(val, base + PCIE_VMAP_xP_VIRTID);
+
+ val = readl(base + PCIE_VMAP_xP_CTRL);
+ val |= PCIE_VMAP_xP_CTRL_EN;
+ writel(val, base + PCIE_VMAP_xP_CTRL);
+ }
+ }
+
+ return 0;
+}
+
+static void ks_release_restricted_dma(struct platform_device *pdev)
+{
+ struct of_phandle_iterator it;
+ struct resource phys;
+ int err;
+
+ of_for_each_phandle(&it, err, pdev->dev.of_node, "memory-region",
+ NULL, 0) {
+ if (of_device_is_compatible(it.node, "restricted-dma-pool") &&
+ of_address_to_resource(it.node, 0, &phys) == 0)
+ ti_pvu_remove_region(KS_PCI_VIRTID, &phys);
+
+ }
+}
+#else
+static inline int ks_init_restricted_dma(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static inline void ks_release_restricted_dma(struct platform_device *pdev)
+{
+}
+#endif
+
static int ks_pcie_probe(struct platform_device *pdev)
{
const struct dw_pcie_host_ops *host_ops;
@@ -1273,6 +1368,10 @@ static int ks_pcie_probe(struct platform_device *pdev)
if (ret < 0)
goto err_get_sync;
+ ret = ks_init_restricted_dma(pdev);
+ if (ret < 0)
+ goto err_get_sync;
+
switch (mode) {
case DW_PCIE_RC_TYPE:
if (!IS_ENABLED(CONFIG_PCI_KEYSTONE_HOST)) {
@@ -1354,6 +1453,8 @@ static void ks_pcie_remove(struct platform_device *pdev)
int num_lanes = ks_pcie->num_lanes;
struct device *dev = &pdev->dev;
+ ks_release_restricted_dma(pdev);
+
pm_runtime_put(dev);
pm_runtime_disable(dev);
ks_pcie_disable_phy(ks_pcie);