| Message ID | 3f6f38c06b065f5f6034ad4ed3a24902ee59f378.1728300190.git.andrea.porta@suse.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for RaspberryPi RP1 PCI device using a DT overlay | expand |
Hi Andrea, On Mon, 7 Oct 2024 14:39:53 +0200 Andrea della Porta <andrea.porta@suse.com> wrote: > RaspberryPi RP1 is a multi function PCI endpoint device that > exposes several subperipherals via PCI BAR. > Add a dtb overlay that will be compiled into a binary blob > and linked in the RP1 driver. > This overlay offers just minimal support to represent the > RP1 device itself, the sub-peripherals will be added by > future patches. > > Signed-off-by: Andrea della Porta <andrea.porta@suse.com> > --- ... > +/ { > + fragment@0 { > + target-path=""; > + __overlay__ { > + compatible = "pci1de4,1"; The compatible is not needed here. Indeed, it will be added by the PCI core when it scans the bus and adds the missing nodes. https://elixir.bootlin.com/linux/v6.12-rc2/source/drivers/pci/of_property.c#L383 > + #address-cells = <3>; > + #size-cells = <2>; > + > + pci_ep_bus: pci-ep-bus@1 { > + compatible = "simple-bus"; > + ranges = <0xc0 0x40000000 > + 0x01 0x00 0x00000000 > + 0x00 0x00400000>; > + dma-ranges = <0x10 0x00000000 > + 0x43000000 0x10 0x00000000 > + 0x10 0x00000000>; > + #address-cells = <2>; > + #size-cells = <2>; > + interrupt-controller; > + interrupt-parent = <&pci_ep_bus>; > + #interrupt-cells = <2>; Not sure this node should be an interrupt controller. The interrupt controller is the PCI device itself (i.e.the node where the overlay is applied). Best regards, Hervé
Hi Herve, On 16:57 Mon 07 Oct , Herve Codina wrote: > Hi Andrea, > > On Mon, 7 Oct 2024 14:39:53 +0200 > Andrea della Porta <andrea.porta@suse.com> wrote: > > > RaspberryPi RP1 is a multi function PCI endpoint device that > > exposes several subperipherals via PCI BAR. > > Add a dtb overlay that will be compiled into a binary blob > > and linked in the RP1 driver. > > This overlay offers just minimal support to represent the > > RP1 device itself, the sub-peripherals will be added by > > future patches. > > > > Signed-off-by: Andrea della Porta <andrea.porta@suse.com> > > --- > > ... > > +/ { > > + fragment@0 { > > + target-path=""; > > + __overlay__ { > > + compatible = "pci1de4,1"; > > The compatible is not needed here. Indeed, it will be added by the PCI core > when it scans the bus and adds the missing nodes. > https://elixir.bootlin.com/linux/v6.12-rc2/source/drivers/pci/of_property.c#L383 Sure, but I've added it so that the dts could be validated. > > > + #address-cells = <3>; > > + #size-cells = <2>; > > + > > + pci_ep_bus: pci-ep-bus@1 { > > + compatible = "simple-bus"; > > + ranges = <0xc0 0x40000000 > > + 0x01 0x00 0x00000000 > > + 0x00 0x00400000>; > > + dma-ranges = <0x10 0x00000000 > > + 0x43000000 0x10 0x00000000 > > + 0x10 0x00000000>; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + interrupt-controller; > > + interrupt-parent = <&pci_ep_bus>; > > + #interrupt-cells = <2>; > > Not sure this node should be an interrupt controller. > The interrupt controller is the PCI device itself (i.e.the node > where the overlay is applied). Right. Many thanks, Andrea > > Best regards, > Hervé >
diff --git a/MAINTAINERS b/MAINTAINERS index 06277969a522..510a071ede78 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19383,6 +19383,7 @@ F: include/uapi/linux/media/raspberrypi/ RASPBERRY PI RP1 PCI DRIVER M: Andrea della Porta <andrea.porta@suse.com> S: Maintained +F: arch/arm64/boot/dts/broadcom/rp1.dtso F: Documentation/devicetree/bindings/clock/raspberrypi,rp1-clocks.yaml F: Documentation/devicetree/bindings/misc/pci1de4,1.yaml F: Documentation/devicetree/bindings/pci/pci-ep-bus.yaml diff --git a/arch/arm64/boot/dts/broadcom/rp1.dtso b/arch/arm64/boot/dts/broadcom/rp1.dtso new file mode 100644 index 000000000000..846a0c99a098 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/rp1.dtso @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/raspberrypi,rp1-clocks.h> + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target-path=""; + __overlay__ { + compatible = "pci1de4,1"; + #address-cells = <3>; + #size-cells = <2>; + + pci_ep_bus: pci-ep-bus@1 { + compatible = "simple-bus"; + ranges = <0xc0 0x40000000 + 0x01 0x00 0x00000000 + 0x00 0x00400000>; + dma-ranges = <0x10 0x00000000 + 0x43000000 0x10 0x00000000 + 0x10 0x00000000>; + #address-cells = <2>; + #size-cells = <2>; + interrupt-controller; + interrupt-parent = <&pci_ep_bus>; + #interrupt-cells = <2>; + + rp1_clocks: clocks@c040018000 { + compatible = "raspberrypi,rp1-clocks"; + reg = <0xc0 0x40018000 0x0 0x10038>; + #clock-cells = <1>; + clocks = <&clk_rp1_xosc>; + clock-names = "rp1-xosc"; + assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>, + <&rp1_clocks RP1_PLL_SYS>, + <&rp1_clocks RP1_CLK_SYS>; + assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE + <200000000>, // RP1_PLL_SYS + <200000000>; // RP1_CLK_SYS + }; + + rp1_gpio: pinctrl@c0400d0000 { + compatible = "raspberrypi,rp1-gpio"; + reg = <0xc0 0x400d0000 0x0 0xc000>, + <0xc0 0x400e0000 0x0 0xc000>, + <0xc0 0x400f0000 0x0 0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, + <1 IRQ_TYPE_LEVEL_HIGH>, + <2 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + }; + }; +};
RaspberryPi RP1 is a multi function PCI endpoint device that exposes several subperipherals via PCI BAR. Add a dtb overlay that will be compiled into a binary blob and linked in the RP1 driver. This overlay offers just minimal support to represent the RP1 device itself, the sub-peripherals will be added by future patches. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> --- NOTE: this patch should be taken by the same maintainer that will take "[PATCH v2 11/14] misc: rp1: RaspberryPi RP1 misc driver", since they are closely related in terms of compiling. MAINTAINERS | 1 + arch/arm64/boot/dts/broadcom/rp1.dtso | 62 +++++++++++++++++++++++++++ 2 files changed, 63 insertions(+) create mode 100644 arch/arm64/boot/dts/broadcom/rp1.dtso