| Message ID | 4557515b4df0ebe7fb8c1fd8b3725386bf77d1a4.1728980110.git.0x1207@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | net: stmmac: Refactor FPE as a separate module | expand |
On Tue, Oct 15, 2024 at 05:09:25PM +0800, Furong Xu wrote: > Synopsys XGMAC Databook defines MAC_RxQ_Ctrl1 register: > RQ: Frame Preemption Residue Queue > > XGMAC_FPRQ is more readable and more consistent with GMAC4. > > Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Simon Horman <horms@kernel.org>
On Tue, Oct 15, 2024 at 05:09:25PM +0800, Furong Xu wrote: > Synopsys XGMAC Databook defines MAC_RxQ_Ctrl1 register: > RQ: Frame Preemption Residue Queue > > XGMAC_FPRQ is more readable and more consistent with GMAC4. > > Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Simon Horman <horms@kernel.org>
On Tue, Oct 15, 2024 at 05:09:25PM +0800, Furong Xu wrote: > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > index 917796293c26..c66fa6040672 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > @@ -84,8 +84,8 @@ > #define XGMAC_MCBCQEN BIT(15) > #define XGMAC_MCBCQ GENMASK(11, 8) > #define XGMAC_MCBCQ_SHIFT 8 > -#define XGMAC_RQ GENMASK(7, 4) > -#define XGMAC_RQ_SHIFT 4 > +#define XGMAC_FPRQ GENMASK(7, 4) > +#define XGMAC_FPRQ_SHIFT 4 If you made use of FIELD_PREP(), you would not need the _SHIFT variant at all (though that would be a separate logical change). > #define XGMAC_UPQ GENMASK(3, 0) > #define XGMAC_UPQ_SHIFT 0 > #define XGMAC_RXQ_CTRL2 0x000000a8
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 917796293c26..c66fa6040672 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -84,8 +84,8 @@ #define XGMAC_MCBCQEN BIT(15) #define XGMAC_MCBCQ GENMASK(11, 8) #define XGMAC_MCBCQ_SHIFT 8 -#define XGMAC_RQ GENMASK(7, 4) -#define XGMAC_RQ_SHIFT 4 +#define XGMAC_FPRQ GENMASK(7, 4) +#define XGMAC_FPRQ_SHIFT 4 #define XGMAC_UPQ GENMASK(3, 0) #define XGMAC_UPQ_SHIFT 0 #define XGMAC_RXQ_CTRL2 0x000000a8 diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c index 0c13d5aee3d2..6060a1d702c6 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -332,8 +332,8 @@ static void dwxgmac3_fpe_configure(void __iomem *ioaddr, } value = readl(ioaddr + XGMAC_RXQ_CTRL1); - value &= ~XGMAC_RQ; - value |= (num_rxq - 1) << XGMAC_RQ_SHIFT; + value &= ~XGMAC_FPRQ; + value |= (num_rxq - 1) << XGMAC_FPRQ_SHIFT; writel(value, ioaddr + XGMAC_RXQ_CTRL1); value = readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS);
Synopsys XGMAC Databook defines MAC_RxQ_Ctrl1 register: RQ: Frame Preemption Residue Queue XGMAC_FPRQ is more readable and more consistent with GMAC4. Signed-off-by: Furong Xu <0x1207@gmail.com> --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 4 ++-- drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)