| Message ID | 45a061c3b0463aac7d10664f47c4afdd999da50d.1619699721.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: renesas: Add missing opp-suspend properties | expand |
Hi Geert, Thanks for your patch. On 2021-05-27 15:42:42 +0200, Geert Uytterhoeven wrote: > Tag the highest "Power Optimized" (1.5 GHz) Cortex-A57 operating point > table entries for the RZ/G2M, R-Car M3-W and M3-W+ SoCs with the > "opp-suspend" property. This makes sure the system will enter suspend > in the same performance state as it will be resumed by the firmware > later, avoiding state inconsistencies after resume. > > Based on a patch for R-Car M3-W in the BSP by Takeshi Kihara > <takeshi.kihara.df@renesas.com>. > > Fixes: 800037e815b91d8c ("arm64: dts: renesas: r8a774a1: Add operating points") > Fixes: da7e3113344fda50 ("arm64: dts: renesas: r8a7796: Add OPPs table for cpu devices") > Fixes: f51746ad7d1ff6b4 ("arm64: dts: renesas: Add Renesas R8A77961 SoC support") > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > Somehow I failed to send this patch, which is a contextual dependency for > "[PATCH] arm64: dts: renesas: r8a7796[01]: Fix OPP table entry voltages" > https://lore.kernel.org/r/b9e9db907514790574429b83d070c823b36085ef.1619699909.git.geert+renesas@glider.be/ > > To be queued in renesas-devel for v5.14. > > arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 1 + > arch/arm64/boot/dts/renesas/r8a77960.dtsi | 1 + > arch/arm64/boot/dts/renesas/r8a77961.dtsi | 1 + > 3 files changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > index c3d312af6fe95f2c..78c121a89f11b8ae 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > @@ -76,6 +76,7 @@ opp-1500000000 { > opp-hz = /bits/ 64 <1500000000>; > opp-microvolt = <820000>; > clock-latency-ns = <300000>; > + opp-suspend; > }; > }; > > diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi > index d21be2f195b3be18..63bb395a6a64499a 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi > @@ -75,6 +75,7 @@ opp-1500000000 { > opp-hz = /bits/ 64 <1500000000>; > opp-microvolt = <820000>; > clock-latency-ns = <300000>; > + opp-suspend; > }; > opp-1600000000 { > opp-hz = /bits/ 64 <1600000000>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > index 941f18e5f5d29cda..c8b73108a4c8185d 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > @@ -64,6 +64,7 @@ opp-1500000000 { > opp-hz = /bits/ 64 <1500000000>; > opp-microvolt = <820000>; > clock-latency-ns = <300000>; > + opp-suspend; > }; > opp-1600000000 { > opp-hz = /bits/ 64 <1600000000>; > -- > 2.25.1 >
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index c3d312af6fe95f2c..78c121a89f11b8ae 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -76,6 +76,7 @@ opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <820000>; clock-latency-ns = <300000>; + opp-suspend; }; }; diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi index d21be2f195b3be18..63bb395a6a64499a 100644 --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi @@ -75,6 +75,7 @@ opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <820000>; clock-latency-ns = <300000>; + opp-suspend; }; opp-1600000000 { opp-hz = /bits/ 64 <1600000000>; diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index 941f18e5f5d29cda..c8b73108a4c8185d 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -64,6 +64,7 @@ opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <820000>; clock-latency-ns = <300000>; + opp-suspend; }; opp-1600000000 { opp-hz = /bits/ 64 <1600000000>;
Tag the highest "Power Optimized" (1.5 GHz) Cortex-A57 operating point table entries for the RZ/G2M, R-Car M3-W and M3-W+ SoCs with the "opp-suspend" property. This makes sure the system will enter suspend in the same performance state as it will be resumed by the firmware later, avoiding state inconsistencies after resume. Based on a patch for R-Car M3-W in the BSP by Takeshi Kihara <takeshi.kihara.df@renesas.com>. Fixes: 800037e815b91d8c ("arm64: dts: renesas: r8a774a1: Add operating points") Fixes: da7e3113344fda50 ("arm64: dts: renesas: r8a7796: Add OPPs table for cpu devices") Fixes: f51746ad7d1ff6b4 ("arm64: dts: renesas: Add Renesas R8A77961 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- Somehow I failed to send this patch, which is a contextual dependency for "[PATCH] arm64: dts: renesas: r8a7796[01]: Fix OPP table entry voltages" https://lore.kernel.org/r/b9e9db907514790574429b83d070c823b36085ef.1619699909.git.geert+renesas@glider.be/ To be queued in renesas-devel for v5.14. arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77960.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77961.dtsi | 1 + 3 files changed, 3 insertions(+)