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[v2] ARM: shmobile: r8a7791: add ADSP clocks

Message ID 4692589.Khlcz7yVTN@wasted.cogentembedded.com (mailing list archive)
State New, archived
Headers show

Commit Message

Sergei Shtylyov Dec. 30, 2014, 8:20 p.m. UTC
Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree.

Based on the original patch by Konstantin Kozhevnikov
<konstantin.kozhevnikov@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
The patch is against 'renesas-devel-20141229-v3.19-rc2' tag of Simon Horman's
'renesas.git' repo plus the R8A7791 CAN patches posted last week. It depends on
the patch adding the ADSP clock support to  the 'clk-rcar-gen2' driver in order
to work.

Changes in version 2:
- avoided changing #define R8A7791_CLK_RCAN, so had to swap "adsp" and "rcan" in
  the "clock-output-names" property of the CPG node.

 arch/arm/boot/dts/r8a7791.dtsi            |   11 +++++++----
 include/dt-bindings/clock/r8a7791-clock.h |    2 ++
 2 files changed, 9 insertions(+), 4 deletions(-)

Comments

Geert Uytterhoeven Jan. 5, 2015, 1:41 p.m. UTC | #1
On Tue, Dec 30, 2014 at 9:20 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree.
>
> Based on the original patch by Konstantin Kozhevnikov
> <konstantin.kozhevnikov@cogentembedded.com>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Sergei Shtylyov Feb. 20, 2015, 8:02 p.m. UTC | #2
Hello.

On 12/30/2014 11:20 PM, Sergei Shtylyov wrote:

> Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree.

> Based on the original patch by Konstantin Kozhevnikov
> <konstantin.kozhevnikov@cogentembedded.com>.

> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

> ---
> The patch is against 'renesas-devel-20141229-v3.19-rc2' tag of Simon Horman's
> 'renesas.git' repo plus the R8A7791 CAN patches posted last week. It depends on
> the patch adding the ADSP clock support to  the 'clk-rcar-gen2' driver in order
> to work.

    That patch now sits in Mike's tree and should soon be merged by Linus. 
Simon, please consider merging this patch.

WBR, Sergei
Simon Horman Feb. 20, 2015, 8:51 p.m. UTC | #3
On Fri, Feb 20, 2015 at 11:02:52PM +0300, Sergei Shtylyov wrote:
> Hello.
> 
> On 12/30/2014 11:20 PM, Sergei Shtylyov wrote:
> 
> >Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree.
> 
> >Based on the original patch by Konstantin Kozhevnikov
> ><konstantin.kozhevnikov@cogentembedded.com>.
> 
> >Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> 
> >---
> >The patch is against 'renesas-devel-20141229-v3.19-rc2' tag of Simon Horman's
> >'renesas.git' repo plus the R8A7791 CAN patches posted last week. It depends on
> >the patch adding the ADSP clock support to  the 'clk-rcar-gen2' driver in order
> >to work.
> 
>    That patch now sits in Mike's tree and should soon be merged by Linus.
> Simon, please consider merging this patch.

Thanks, done.
diff mbox

Patch

Index: renesas/arch/arm/boot/dts/r8a7791.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7791.dtsi
+++ renesas/arch/arm/boot/dts/r8a7791.dtsi
@@ -909,7 +909,7 @@ 
 			#clock-cells = <1>;
 			clock-output-names = "main", "pll0", "pll1", "pll3",
 					     "lb", "qspi", "sdh", "sd0", "z",
-					     "rcan";
+					     "rcan", "adsp";
 		};
 
 		/* Variable factor clocks */
@@ -1164,13 +1164,16 @@ 
 		mstp5_clks: mstp5_clks@e6150144 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
-			clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;
+			clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>,
+				 <&extal_clk>, <&p_clk>;
 			#clock-cells = <1>;
 			clock-indices = <
 				R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
-				R8A7791_CLK_THERMAL R8A7791_CLK_PWM
+				R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL
+				R8A7791_CLK_PWM
 			>;
-			clock-output-names = "audmac0", "audmac1", "thermal", "pwm";
+			clock-output-names = "audmac0", "audmac1", "adsp_mod",
+					     "thermal", "pwm";
 		};
 		mstp7_clks: mstp7_clks@e615014c {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
Index: renesas/include/dt-bindings/clock/r8a7791-clock.h
===================================================================
--- renesas.orig/include/dt-bindings/clock/r8a7791-clock.h
+++ renesas/include/dt-bindings/clock/r8a7791-clock.h
@@ -21,6 +21,7 @@ 
 #define R8A7791_CLK_SD0			7
 #define R8A7791_CLK_Z			8
 #define R8A7791_CLK_RCAN		9
+#define R8A7791_CLK_ADSP		10
 
 /* MSTP0 */
 #define R8A7791_CLK_MSIOF0		0
@@ -72,6 +73,7 @@ 
 /* MSTP5 */
 #define R8A7791_CLK_AUDIO_DMAC1		1
 #define R8A7791_CLK_AUDIO_DMAC0		2
+#define R8A7791_CLK_ADSP_MOD		6
 #define R8A7791_CLK_THERMAL		22
 #define R8A7791_CLK_PWM			23