From patchwork Tue Dec 30 20:20:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 5553071 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 984CABF6C3 for ; Tue, 30 Dec 2014 20:23:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6085320173 for ; Tue, 30 Dec 2014 20:23:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1AB1F2012E for ; Tue, 30 Dec 2014 20:23:13 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y63Hp-0005Yf-Ev; Tue, 30 Dec 2014 20:21:01 +0000 Received: from mail-la0-f50.google.com ([209.85.215.50]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y63Hn-0005XN-G0 for linux-arm-kernel@lists.infradead.org; Tue, 30 Dec 2014 20:21:00 +0000 Received: by mail-la0-f50.google.com with SMTP id pn19so12902814lab.23 for ; Tue, 30 Dec 2014 12:20:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:mime-version:content-transfer-encoding:content-type; bh=NlcfXoNLGusnQfWkjkEqHUCmVonsxup3htj880lAaZM=; b=btm1JM+lfw+ahhkCD/C2AB7ZFGg4lA+fNcA/racoS7ZROSLrPinU0e4XhE9z1DCg/m E4J/IcAjYXQ6oyakeEk1TP7gbrOZajj/eF327AioI97FWABf/a0F0ou9FjwIsYW5al2A RHG+9RybEkDo2fjApPlIhEGsxXZ/AY4l2DHOpdrE6qu3ukdGbBlYI4mBKiqLm/N2pUvF 9C6jbv5yACehdENrpPStG2QobWV5f2s6BYHo40eNnru7/Qos0zANZbPBl4Lae8+W93Da UZIejb1UGo0uCS4XmXkBrKX4EQBbMJkXoOvYtTxDoFpAb6VcYctj6oMcFaX+0lfHMKB2 mX7w== X-Gm-Message-State: ALoCoQld/J2YT8Xl0ORJbo+HkWQh71ATvzh9YwsQ/6OCcg8C5fpTxWYD9pmmgJTkFTgpnPJ12AR1 X-Received: by 10.112.171.199 with SMTP id aw7mr62760907lbc.40.1419970837155; Tue, 30 Dec 2014 12:20:37 -0800 (PST) Received: from wasted.cogentembedded.com (ppp27-243.pppoe.mtu-net.ru. [81.195.27.243]) by mx.google.com with ESMTPSA id p10sm10868844lap.10.2014.12.30.12.20.35 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 30 Dec 2014 12:20:36 -0800 (PST) From: Sergei Shtylyov To: horms@verge.net.au, linux-sh@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org Subject: [PATCH v2] ARM: shmobile: r8a7791: add ADSP clocks Date: Tue, 30 Dec 2014 23:20:34 +0300 Message-ID: <4692589.Khlcz7yVTN@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.3 (Linux/3.17.7-200.fc20.x86_64; KDE/4.14.3; x86_64; ; ) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141230_122059_727742_3FCF7449 X-CRM114-Status: GOOD ( 12.40 ) X-Spam-Score: -0.7 (/) Cc: linux@arm.linux.org.uk, magnus.damm@gmail.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree. Based on the original patch by Konstantin Kozhevnikov . Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven --- The patch is against 'renesas-devel-20141229-v3.19-rc2' tag of Simon Horman's 'renesas.git' repo plus the R8A7791 CAN patches posted last week. It depends on the patch adding the ADSP clock support to the 'clk-rcar-gen2' driver in order to work. Changes in version 2: - avoided changing #define R8A7791_CLK_RCAN, so had to swap "adsp" and "rcan" in the "clock-output-names" property of the CPG node. arch/arm/boot/dts/r8a7791.dtsi | 11 +++++++---- include/dt-bindings/clock/r8a7791-clock.h | 2 ++ 2 files changed, 9 insertions(+), 4 deletions(-) Index: renesas/arch/arm/boot/dts/r8a7791.dtsi =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7791.dtsi +++ renesas/arch/arm/boot/dts/r8a7791.dtsi @@ -909,7 +909,7 @@ #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "z", - "rcan"; + "rcan", "adsp"; }; /* Variable factor clocks */ @@ -1164,13 +1164,16 @@ mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; + clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>, + <&extal_clk>, <&p_clk>; #clock-cells = <1>; clock-indices = < R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1 - R8A7791_CLK_THERMAL R8A7791_CLK_PWM + R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL + R8A7791_CLK_PWM >; - clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; + clock-output-names = "audmac0", "audmac1", "adsp_mod", + "thermal", "pwm"; }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; Index: renesas/include/dt-bindings/clock/r8a7791-clock.h =================================================================== --- renesas.orig/include/dt-bindings/clock/r8a7791-clock.h +++ renesas/include/dt-bindings/clock/r8a7791-clock.h @@ -21,6 +21,7 @@ #define R8A7791_CLK_SD0 7 #define R8A7791_CLK_Z 8 #define R8A7791_CLK_RCAN 9 +#define R8A7791_CLK_ADSP 10 /* MSTP0 */ #define R8A7791_CLK_MSIOF0 0 @@ -72,6 +73,7 @@ /* MSTP5 */ #define R8A7791_CLK_AUDIO_DMAC1 1 #define R8A7791_CLK_AUDIO_DMAC0 2 +#define R8A7791_CLK_ADSP_MOD 6 #define R8A7791_CLK_THERMAL 22 #define R8A7791_CLK_PWM 23