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Mon, 29 Apr 2024 21:44:07 -0700 From: Nicolin Chen To: , CC: , , , , , , , , Subject: [PATCH v6 3/6] iommu/arm-smmu-v3: Make arm_smmu_cmdq_init reusable Date: Mon, 29 Apr 2024 21:43:46 -0700 Message-ID: <47a2ec844ec42694872d3c3b1a09f1b870712f78.1714451595.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001507:EE_|PH7PR12MB7114:EE_ X-MS-Office365-Filtering-Correlation-Id: 1cdf2d1d-12b4-440c-c178-08dc68d03004 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|1800799015|376005|82310400014|36860700004; X-Microsoft-Antispam-Message-Info: GJ10XDkzhv9XFd54NBCw8CCJ2/hLTcxZ640XjbpOJRM20G8T3WV+yjIUZCUmQI+odSkE5nbhVUizw2uspr/0ZxW/YUwgHeHG4si1fU5gvsCPnnWx0G/6pVJRqBjDSCC+RjZcPvY19wM9UmIrjPYFrudi3wLTwIm/ck5jS9dd8pzIfjBi/Rj0wZz7QRSuL/kBUcUlBpnwOkmrdzNdHy+8EUsQEWuPkeyfLGic/ThrtDXv2LoQsv6NYkBiVcX9SZS9dZSGaDvrzjg5SCNdert5tBM67mO+ROlRJ1Aafd5GqMK29snQqrf/7ZYsdE6PtpTjY3y2gWd5LC7GrKvLvyMOGWAFfhe/Cedxa35qH3tEpmvwTSwEs32VScMTS5MC2H87VseKXEcMOuhcROsxGEtGZ/Pt9CV0USvMqG1Ym/iKo/8xOS0ZSpxxt9b41g0LcGSS31gGWJSrmzNEc7aYDJplrQOqxPlPYGRFTy6D0Bg3lDsiqAVujjhdzWOsSg3ZH3YXXHOejEc2Qwr4+uYKoA/w+WBuM3VVyDfvJQdefLLNX78XNZ78g5nQpAl0xHFZ9ctoFE7eSG9QjYRLigVSl+NhCVDqnR5uGNNCKXRdXuqudw5JqjXJTFAIrLW/GgLhVGpPlb55FHHADzHz2Vwx9asFB92F1ZtJfT2dDS7V/YrARpkhR1AZ829ZVt4vKhCQFB+EAZ0FKWulJu9ZYu7yJj9D/y0+G6RLaddLzI8JFikicEvseMhfxi9KfLENlCd5Uz5ZqQA6OZqQW2QFw2dvnOfGd0KFTvkeGesQHUiVFopfrRACv1p3X9lupEDeHp1dVE4WHqvvZjy3YaUVCaOpr8J5RJdkOOIae01R/4kIAQpfxNeuFE22INRmiUPy/cDUJfin3HCTAl/aQ8L3lsBdpK+6+bsCsYBWXuLawKGpIx+xLsn0XXmgMeJ42mVmO3FuVldyB70x2OZAvbdklv32u+jRqed+/e99qBPVZZSPaLsiv5koC68dsV4J0Ce9W+D48oqVEXmf2/tyFXTCOfZGF0ZRCZrmvVGdXRB8kt2blcYO60XfFXy9cWIm/QQZvr0RES6cgbyEgG1wUiMdlaFGmINVazb1/XBmhP3k38RfgLgVvjyk7tyepB0RpGbqV7MSjNsSGm9RYxXodcNMIKbhS2M8qh9dRunumzIn5Imc28gdv/tB7ImKZbX3uTt4Kl/X4ld1mQbkHzrJdgKlyT75Nm7BSPsNZwqfzg+YH3ax1hbqI6H2ZB31l8gl6PH9Mak3jJJA4JnnfMCO8KQlDmrv9aLoTN/cUpQSCs9yIif8GRlIxxERvAwfDkA5ZSxqS9amV6UWVHvx375EwFrsCKtmK97NeFp7ME1H7Oz+UuJ7hoNjMjrMQZ7fZ53+y5tSDNoC+tcx X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230031)(1800799015)(376005)(82310400014)(36860700004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2024 04:44:14.6620 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1cdf2d1d-12b4-440c-c178-08dc68d03004 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001507.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7114 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240429_214424_603642_77C12204 X-CRM114-Status: GOOD ( 13.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The CMDQV extension in NVIDIA Tegra241 SoC resues the arm_smmu_cmdq structure while the queue location isn't same as smmu->cmdq. Add a cmdq argument to arm_smmu_cmdq_init() function and shares its define in the header for CMDQV driver to use. Signed-off-by: Nicolin Chen Reviewed-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +++--- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 +++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index b3d03ca01adc..538850059bdd 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3145,9 +3145,9 @@ static int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, return 0; } -static int arm_smmu_cmdq_init(struct arm_smmu_device *smmu) +int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq) { - struct arm_smmu_cmdq *cmdq = &smmu->cmdq; unsigned int nents = 1 << cmdq->q.llq.max_n_shift; atomic_set(&cmdq->owner_prod, 0); @@ -3172,7 +3172,7 @@ static int arm_smmu_init_queues(struct arm_smmu_device *smmu) if (ret) return ret; - ret = arm_smmu_cmdq_init(smmu); + ret = arm_smmu_cmdq_init(smmu, &smmu->cmdq); if (ret) return ret; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index bbee08e82943..ab2824e46ac5 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -760,6 +760,9 @@ bool arm_smmu_free_asid(struct arm_smmu_ctx_desc *cd); int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, int ssid, unsigned long iova, size_t size); +int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq); + #ifdef CONFIG_ARM_SMMU_V3_SVA bool arm_smmu_sva_supported(struct arm_smmu_device *smmu); bool arm_smmu_master_sva_supported(struct arm_smmu_master *master);