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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id k46sm4208953wre.1.2017.08.04.03.29.55 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 04 Aug 2017 03:29:55 -0700 (PDT) From: Michal Simek To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] devicetree: ARM: zynq: Add DT binding for eFuse controller Date: Fri, 4 Aug 2017 12:29:53 +0200 Message-Id: <4b4bfaad88f16d7229bf3da58be8f50f9d82a461.1501842586.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170804_033019_060153_F3BBB0CC X-CRM114-Status: GOOD ( 11.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Peter Crosthwaite , Josh Cartwright , monstr@monstr.eu, linux-kernel@vger.kernel.org, Rob Herring , Rob Herring , Steffen Trumtrar , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add DT binding for eFuse controller available at Xilinx Zynq SoC. Signed-off-by: Michal Simek Acked-by: Sören Brinkmann Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/zynq/zynq-efuse.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/zynq/zynq-efuse.txt diff --git a/Documentation/devicetree/bindings/arm/zynq/zynq-efuse.txt b/Documentation/devicetree/bindings/arm/zynq/zynq-efuse.txt new file mode 100644 index 000000000000..39817e9750c3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/zynq/zynq-efuse.txt @@ -0,0 +1,15 @@ +Device tree bindings for Zynq's eFuse Controller + +The Zynq eFuse controller provides the access to the chip efuses which contain +information about device DNA, security settings and also device status. + +Required properties: + compatible: Compatibility string. Must be "xlnx,zynq-efuse". + reg: Specify the base and size of the EFUSE controller registers + in the memory map. E.g.: reg = <0xf800d000 0x20>; + +Example: +efuse: efuse@f800d000 { + compatible = "xlnx,zynq-efuse"; + reg = <0xf800d000 0x20>; +};