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Tue, 14 Aug 2018 16:51:00 +0000 From: Leonard Crestez To: Shawn Guo , Lorenzo Pieralisi , Philipp Zabel , Lucas Stach Subject: [PATCH v4 2/6] PCI: imx: Initial imx7d pm support Date: Tue, 14 Aug 2018 19:50:16 +0300 Message-Id: <4b786ba5d84a0ba90d2f04beacedb0de1e529fd8.1534264292.git.leonard.crestez@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [95.76.156.53] X-ClientProxiedBy: VI1PR0102CA0077.eurprd01.prod.exchangelabs.com (2603:10a6:803:15::18) To AM6PR04MB4293.eurprd04.prod.outlook.com (2603:10a6:209:4f::31) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3322c2ed-c278-4889-09f0-08d602061e0c X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0; PCL:0; RULEID:(7020095)(4652040)(8989117)(4534165)(4627221)(201703031133081)(201702281549075)(8990107)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020); SRVR:AM6PR04MB4293; X-Microsoft-Exchange-Diagnostics: 1; AM6PR04MB4293; 3:pE0ieR4/dAnmg1ZgB/3xLSvyodgwNdazKFzG/q7WRnplBQDH7aN22h7Dg6qP4MvBEcEL3L6EZB4ftAuqRjTfnrBtQpdeq9uDMCxgi7wkVnAJcOj/nPty4+8/L69t1EtKcCN9OVGvlLbI+iqlQ6uRF5T0+ndGZaLnIxkKwVAUphP0TiC6HY6klXhS8U+OmlCQNfcwquMQddZiLj/St6WmezSDQyV6gJRQfgzGkmJQT3j+DBgyhnC+7HP+2KtZDWlP; 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AM6PR04MB4293; 6:hysyMJ5pQzXexq7QG+cIV0W5WD4ox+45JAi//vu8WH4pavZ3+9hA0WmFLqesNfAH0irC8g2FDJ6ilhixnbiCxWlDxGl3h6U/9wWMxxOv4yGl8hGJddU7Olc+t1ALaQLXLxZl7CejOck1GFkwlx5Jwe1sSCcwGx1wV/rbhUCAJssScYqFzU4mn0ZcGbSbPFJTqBAkxvzB/s1+gOqzG0WKJylqDmsSj8+aKwVENAPGAp7lAeKynROHX6u8E/gia1lxB8/YwBhORsS9Yn+FYUOQhQk5f+b9DnOuUS6DCRAOry/m2sYfO1MOdmRTl3LK8XIBE9cYZSZHPdLzpNPHRIoMld3OVPI2FDVRvXtTgjeeJO95MeRaIt9tqyrkA9/oeSJcT62CpmFnxyAiAylaE49Ii4AfORahzaAi7FTVkCwUyqizrObZX6KH3knuzu9xM/DA70ODH8j2R+fjs/AqL4t8Tg==; 5:4+mVTB2bVUrNLUBj1cGQeAzXLeo1hmn0cmH78U5HlnG9SKP5smXr1+tSjDWYJccVcxj9oKVznqQcaPR92ifjSsmnp/7NpYQAENQTCa8aH47gsJtDnLX6m1MSBXBcw2f0kXSRtV+YlTtxGDtKZAhZrb71089x6unOOJVPwj1g8vY=; 7:nhTvNRQljMMWFy7jksS3VpnFUZvfuTfSfYsHvPDmbkuvslixDRON6ohy8U9U6Q6jwI7taZ9x4++5kf9h/RDUf5dHdlosSQicAgi6UNFyIE8wRfGLqP+KssPylIlpKJdiQPsL4fVcQbp3THsu0IfrtD1iCqK8ZrqaGO8rCeSyVyry4Yso8lSVFAE9ZSmBbIHxfmql69aa7srBXY9KHvi9qP0v2jhuo8CcoYCqlub2/kpF1beK1guA2wb97LGbXhgv SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Aug 2018 16:51:00.5520 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3322c2ed-c278-4889-09f0-08d602061e0c X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB4293 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180814_095116_459044_B810C1C6 X-CRM114-Status: GOOD ( 16.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Joao Pinto , Richard Zhu , Anson Huang , Andrey Smirnov , Jingoo Han , linux-kernel@vger.kernel.org, Rob Herring , linux-imx@nxp.com, kernel@pengutronix.de, linux-pci@vger.kernel.org, Bjorn Helgaas , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On imx7d the pcie-phy power domain is turned off in suspend and this can make the system hang after resume when attempting any read from PCI. Fix this by adding minimal suspend/resume code from the nxp internal tree. This will prepare for powering down on suspend and reset the block on resume. Code is only for imx7d but a very similar sequence can be used for other socs. The original author is mostly Richard Zhu , this patch adjusts the code to the upstream imx7d implemention using reset controls and power domains. Signed-off-by: Leonard Crestez Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 97 +++++++++++++++++++++++++-- 1 file changed, 92 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 84c33e0c049d..926858701726 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -584,10 +584,28 @@ static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie) dev_err(dev, "Speed change timeout\n"); return -EINVAL; } +static void imx6_pcie_ltssm_enable(struct device *dev) +{ + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); + + switch (imx6_pcie->variant) { + case IMX6Q: + case IMX6SX: + case IMX6QP: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX6Q_GPR12_PCIE_CTL_2, + IMX6Q_GPR12_PCIE_CTL_2); + break; + case IMX7D: + reset_control_deassert(imx6_pcie->apps_reset); + break; + } +} + static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; struct device *dev = pci->dev; u32 tmp; @@ -602,15 +620,11 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie) tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK; tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1; dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp); /* Start LTSSM. */ - if (imx6_pcie->variant == IMX7D) - reset_control_deassert(imx6_pcie->apps_reset); - else - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6Q_GPR12_PCIE_CTL_2, 1 << 10); + imx6_pcie_ltssm_enable(dev); ret = imx6_pcie_wait_for_link(imx6_pcie); if (ret) goto err_reset_phy; @@ -724,10 +738,82 @@ static int imx6_add_pcie_port(struct imx6_pcie *imx6_pcie, static const struct dw_pcie_ops dw_pcie_ops = { .link_up = imx6_pcie_link_up, }; +#ifdef CONFIG_PM_SLEEP +static void imx6_pcie_ltssm_disable(struct device *dev) +{ + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); + + switch (imx6_pcie->variant) { + case IMX6SX: + case IMX6QP: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX6Q_GPR12_PCIE_CTL_2, 0); + break; + case IMX7D: + reset_control_assert(imx6_pcie->apps_reset); + break; + default: + dev_err(dev, "ltssm_disable not supported\n"); + } +} + +static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) +{ + clk_disable_unprepare(imx6_pcie->pcie); + clk_disable_unprepare(imx6_pcie->pcie_phy); + clk_disable_unprepare(imx6_pcie->pcie_bus); + + if (imx6_pcie->variant == IMX7D) { + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); + } +} + +static int imx6_pcie_suspend_noirq(struct device *dev) +{ + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); + + if (imx6_pcie->variant != IMX7D) + return 0; + + imx6_pcie_clk_disable(imx6_pcie); + imx6_pcie_ltssm_disable(dev); + + return 0; +} + +static int imx6_pcie_resume_noirq(struct device *dev) +{ + int ret; + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); + struct pcie_port *pp = &imx6_pcie->pci->pp; + + if (imx6_pcie->variant != IMX7D) + return 0; + + imx6_pcie_assert_core_reset(imx6_pcie); + imx6_pcie_init_phy(imx6_pcie); + imx6_pcie_deassert_core_reset(imx6_pcie); + dw_pcie_setup_rc(pp); + + ret = imx6_pcie_establish_link(imx6_pcie); + if (ret < 0) + dev_info(dev, "pcie link is down after resume.\n"); + + return 0; +} +#endif + +static const struct dev_pm_ops imx6_pcie_pm_ops = { + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(imx6_pcie_suspend_noirq, + imx6_pcie_resume_noirq) +}; + static int imx6_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct dw_pcie *pci; struct imx6_pcie *imx6_pcie; @@ -894,10 +980,11 @@ static const struct of_device_id imx6_pcie_of_match[] = { static struct platform_driver imx6_pcie_driver = { .driver = { .name = "imx6q-pcie", .of_match_table = imx6_pcie_of_match, .suppress_bind_attrs = true, + .pm = &imx6_pcie_pm_ops, }, .probe = imx6_pcie_probe, .shutdown = imx6_pcie_shutdown, };