From patchwork Tue May 31 21:46:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Gardiner X-Patchwork-Id: 834072 Received: from canuck.infradead.org (canuck.infradead.org [134.117.69.58]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p4VLnSTa010525 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 31 May 2011 21:49:49 GMT Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QRWmy-0003la-By; Tue, 31 May 2011 21:47:48 +0000 Received: from na3sys009aog115.obsmtp.com ([74.125.149.238]) by canuck.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1QRWmS-0003Sv-0U for linux-arm-kernel@lists.infradead.org; Tue, 31 May 2011 21:47:21 +0000 Received: from mail-qw0-f54.google.com ([209.85.216.54]) (using TLSv1) by na3sys009aob115.postini.com ([74.125.148.12]) with SMTP ID DSNKTeVhytq1ZpBLidRXRbZMRtmElBdAeLNS@postini.com; Tue, 31 May 2011 14:47:15 PDT Received: by mail-qw0-f54.google.com with SMTP id 9so2876956qwc.41 for ; Tue, 31 May 2011 14:46:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nanometrics.ca; s=google; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=ntjrPCbG9hZCOWO8rwB9jXjqSRQgPwUnkpsOf5O7uP4=; b=Khz0Y5y+dx2vXKi7VeE5fSTHxDegZGJgcoamuAKmrLZo5lhMENebB9TlQQg9+WTbm/ UIl2sybvjdmHdl2Byl2DCW3DvUE+0XX3zLmj3/Z8CDNEyRGOvOGVchqq49R5voX5gMOn 6vAv4Mf5kIXPRhnDKrWSjhbUOYyxgcjMjy2CA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=nanometrics.ca; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=CnsoJQW5W9CrnZyj7+AHC38FuNvGOv+co8j1sqQgh2spJ6ZG0icV4Zu8rgfodWRNg6 WFLN/RTCcsl5nBvjFM6P3LsVE+LF6DUHzoex57fsQfX5fQlpCd4QiXnhe2iKn3oieH9i GkGHa+c9Bx7g6Zyt1vZnpy1mA7q69fuOfehQs= Received: by 10.224.74.72 with SMTP id t8mr735484qaj.263.1306878410095; Tue, 31 May 2011 14:46:50 -0700 (PDT) Received: from localhost.localdomain ([206.191.47.130]) by mx.google.com with ESMTPS id t28sm292996qcs.5.2011.05.31.14.46.49 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 31 May 2011 14:46:49 -0700 (PDT) From: Ben Gardiner To: Sekhar Nori , davinci-linux-open-source@linux.davincidsp.com Subject: [PATCH 3/3] [v2] davinci: da850: changed SRAM allocator to shared ram. Date: Tue, 31 May 2011 17:46:43 -0400 Message-Id: <4bae1323133ac01c9e19ceefb366aa9a46365840.1306877621.git.bengardiner@nanometrics.ca> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: References: X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110531_174716_271682_157553EE X-CRM114-Status: GOOD ( 15.73 ) X-Spam-Score: -2.4 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.238 listed in list.dnswl.org] Cc: Subhasish Ghosh , Jean-Christophe PLAGNIOL-VILLARD , Russell King - ARM Linux , Sergei Shtylyov , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 31 May 2011 21:49:49 +0000 (UTC) From: Subhasish Ghosh This patch modifies the sram allocator to allocate memory from the DA8XX shared RAM. Signed-off-by: Subhasish Ghosh [rebased onto consolidated SRAM patches] Signed-off-by: Ben Gardiner Reviewed-by: Sergei Shtylyov --- Changes since v1: * re-sorted the new DA8XX_SHARED_RAM_BASE definition in da8xx.h to between DA8XX_AEMIF_CTL_BASE and DA8XX_ARM_RAM_BASE (Sergei Shtylyov). --- arch/arm/mach-davinci/da850.c | 4 ++-- arch/arm/mach-davinci/include/mach/da8xx.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 904ede9..4781230 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -1093,8 +1093,8 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .gpio_irq = IRQ_DA8XX_GPIO0, .serial_dev = &da8xx_serial_device, .emac_pdata = &da8xx_emac_pdata, - .sram_phys = DA8XX_ARM_RAM_BASE, - .sram_len = SZ_8K, + .sram_phys = DA8XX_SHARED_RAM_BASE, + .sram_len = SZ_128K, .reset_device = &da8xx_wdt_device, }; diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index ad64da7..b67499f 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -67,6 +67,7 @@ extern unsigned int da850_max_speed; #define DA8XX_AEMIF_CS2_BASE 0x60000000 #define DA8XX_AEMIF_CS3_BASE 0x62000000 #define DA8XX_AEMIF_CTL_BASE 0x68000000 +#define DA8XX_SHARED_RAM_BASE 0x80000000 #define DA8XX_ARM_RAM_BASE 0xffff0000 void __init da830_init(void);