From patchwork Tue Jul 17 07:42:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shinya Kuribayashi X-Patchwork-Id: 1203611 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id DC210DF25A for ; Tue, 17 Jul 2012 07:46:06 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sr2Qb-0004Ip-NO; Tue, 17 Jul 2012 07:42:41 +0000 Received: from relmlor1.renesas.com ([210.160.252.171]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sr2QT-0004IQ-Ua for linux-arm-kernel@lists.infradead.org; Tue, 17 Jul 2012 07:42:37 +0000 Received: from relmlir1.idc.renesas.com ([10.200.68.151]) by relmlor1.idc.renesas.com ( SJSMS) with ESMTP id <0M7A002P9O2SVWA0@relmlor1.idc.renesas.com> for linux-arm-kernel@lists.infradead.org; Tue, 17 Jul 2012 16:42:28 +0900 (JST) Received: from relmlac4.idc.renesas.com ([10.200.69.24]) by relmlir1.idc.renesas.com (SJSMS) with ESMTP id <0M7A00ED0O2SIG90@relmlir1.idc.renesas.com> for linux-arm-kernel@lists.infradead.org; Tue, 17 Jul 2012 16:42:28 +0900 (JST) Received: by relmlac4.idc.renesas.com (Postfix, from userid 0) id 2CC19480A4; Tue, 17 Jul 2012 16:42:28 +0900 (JST) Received: from relmlac4.idc.renesas.com (localhost [127.0.0.1]) by relmlac4.idc.renesas.com (Postfix) with ESMTP id 25997480A3; Tue, 17 Jul 2012 16:42:28 +0900 (JST) Received: from relmlii1.idc.renesas.com [10.200.68.65] by relmlac4.idc.renesas.com with ESMTP id SAA00805; Tue, 17 Jul 2012 16:42:28 +0900 X-IronPort-AV: E=Sophos; i="4.77,600,1336316400"; d="scan'208"; a="90476735" Received: from unknown (HELO [10.161.69.127]) ([10.161.69.127]) by relmlii1.idc.renesas.com with ESMTP; Tue, 17 Jul 2012 16:42:27 +0900 Message-id: <5005176C.6050904@renesas.com> Date: Tue, 17 Jul 2012 16:42:36 +0900 From: Shinya Kuribayashi User-Agent: Mozilla/5.0 (Windows NT 5.1; rv:13.0) Gecko/20120614 Thunderbird/13.0.1 MIME-version: 1.0 To: santosh.shilimkar@ti.com Subject: Re: [PATCH v2 2/2] ARM: delay: allow timer-based delay implementation to be selected References: <1340991231-17682-1-git-send-email-will.deacon@arm.com> <1340991231-17682-3-git-send-email-will.deacon@arm.com> <4FFE7DB2.4040702@renesas.com> <20120712084432.GA2816@mudshark.cambridge.arm.com> <4FFE9A69.3060301@renesas.com> <4FFEFDE3.5000403@codeaurora.org> <4FFF8509.2050302@renesas.com> <20120713085746.GA18079@mudshark.cambridge.arm.com> <20120713111337.GH18079@mudshark.cambridge.arm.com> <5004D78E.4050606@renesas.com> In-reply-to: X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: sboyd@codeaurora.org, will.deacon@arm.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On 7/17/2012 3:11 PM, Shilimkar, Santosh wrote: > Thanks for the detailed explanation. CPU clock detection is indeed the > nit way to skip the calibration overhead and this was one of the comment > when I tried to push the skipping of calibration for secondary CPUs. > > Looks like you have a working patch for the clock detection. Will > you able to post that patch so that this long pending calibration > for secondary CPUs gets optimized. Something like this should work (not even build tested, can be applied on top of Will's v2 patchset): And change your ->timer() func (called via time_init) to make use of it: unsigned long freq; /* For UP/SMP systems */ freq = get_CPU_frequency(); calibrate_delay_early(freq); #ifdef CONFIG_SMP /* For SMP systems */ freq = get_Timer_frequency(); init_current_timer_delay(freq); #endif The way to detect CPU clock speed can vary depending on your systems, so hard to be generalized. In my case, I have full-blown clock tree described for my SoCs, and the CPU clock speed can be easily obtained by clk_get_rate("xxx"). Hope this helps! diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c index e1030e1..736dcea 100644 --- a/arch/arm/lib/delay.c +++ b/arch/arm/lib/delay.c @@ -25,6 +25,8 @@ #include #include +static unsigned long lpj_early; + /* * Default to the loop-based delay implementation. */ @@ -59,8 +61,22 @@ void __init init_current_timer_delay(unsigned long freq) { pr_info("Switching to timer-based delay loop\n"); lpj_fine = freq / HZ; + lpj_early = lpj_fine; + loops_per_jiffy = lpj_fine; arm_delay_ops.delay = __timer_delay; arm_delay_ops.const_udelay = __timer_const_udelay; arm_delay_ops.udelay = __timer_udelay; } + +void __cpuinit calibrate_delay_early(unsigned long cpu_freq) +{ + lpj_early = (cpu_freq + HZ/2) / HZ; + loops_per_jiffy = lpj_early; + pr_info("Calibrating delay using CPU frequency.. %lu Hz\n", cpu_freq); +} + +unsigned long __cpuinit calibrate_delay_is_known(void) +{ + return lpj_early; /* this function works for both UP/SMP cases */ +} #endif