From patchwork Sun Jul 29 19:05:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Mack X-Patchwork-Id: 1252771 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 822AEDF25A for ; Sun, 29 Jul 2012 19:09:37 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SvYoe-0005Yb-1M; Sun, 29 Jul 2012 19:06:12 +0000 Received: from mail-wg0-f49.google.com ([74.125.82.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SvYoW-0005Y0-MP for linux-arm-kernel@lists.infradead.org; Sun, 29 Jul 2012 19:06:05 +0000 Received: by wgbez12 with SMTP id ez12so3194604wgb.18 for ; Sun, 29 Jul 2012 12:06:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:x-enigmail-version:content-type; bh=7vGKPQmZ0FYVhMswiog5QMxNzfkJllvljfBd6DJsGvI=; b=OvXeQkAGgScxlidv5ZtZuyMy5U2yED+mwB4rd4cs0nNuImJyPQ/mPX4ngLopImNSQW u38Yijn8hBUf+hkR8nLuBMLnS+7nq+CuqU+68ULXT3hjdrr+0WfUwzonpj1cFvRDVrRF QHzZ9Tb6Z25tRtH4EfJ+ZfsYpXuMrCZMXPeAvKZt39VR7tMtcHwnig9/D1i0jepiIK04 6NEDx68Eo8ynrkozOMPW59qZPG0Gk5RBX5AIUpMZWATewCy8yiGe5te3m3vjdFxm4TEC i9VQ5V/+k1r1hUdPumlR+nzxHk9JoJB9+w+WBiDpj9sPCoyiSXN4DMb4a6KmlIKDKvHg e+Eg== Received: by 10.180.93.68 with SMTP id cs4mr36830940wib.14.1343588763027; Sun, 29 Jul 2012 12:06:03 -0700 (PDT) Received: from [192.168.182.4] ([62.4.132.113]) by mx.google.com with ESMTPS id w7sm12221179wiz.0.2012.07.29.12.06.00 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 29 Jul 2012 12:06:02 -0700 (PDT) Message-ID: <50158997.6020903@gmail.com> Date: Sun, 29 Jul 2012 21:05:59 +0200 From: Daniel Mack User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:14.0) Gecko/20120717 Thunderbird/14.0 MIME-Version: 1.0 To: Daniel Mack Subject: Re: [PATCH v3 9/9] ARM: pxa: add .dtsi files References: <1343470061-16879-1-git-send-email-zonque@gmail.com> <1343470061-16879-10-git-send-email-zonque@gmail.com> In-Reply-To: <1343470061-16879-10-git-send-email-zonque@gmail.com> X-Enigmail-Version: 1.4.3 X-Spam-Note: CRM114 invocation failed X-Spam-Note: SpamAssassin invocation failed Cc: eric.y.miao@gmail.com, linus.walleij@stericsson.com, arnd@arndb.de, haojian.zhuang@gmail.com, grant.likely@secretlab.ca, marek.vasut@gmail.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On 28.07.2012 12:07, Daniel Mack wrote: > This adds .dtsi files to describe the PXA SoCs. pxa3xx simply augments > pxa2xx. Not all devices are listed yet, and it will need some time to > get all the drivers ported. Here's a new version of that patch which adds pxa27x.dtsi and enables the interrupt priority features of pxa3xx and pxa27x. Haojian, is it ok to send the updates inline or would you prefer a new series? Or a branch to pull from? Daniel From f6f6e1b1ed07654a72d2c91e18611e1c5351affb Mon Sep 17 00:00:00 2001 From: Daniel Mack Date: Wed, 25 Jul 2012 17:56:48 +0200 Subject: [PATCH v4] ARM: pxa: add .dtsi files This adds .dtsi files to describe the PXA SoCs. pxa3xx simply augments pxa2xx. Not all devices are listed yet, and it will need some time to get all the drivers ported. For now, pxa27x.dtsi only enables the PXA's interrupt priority feature. Signed-off-by: Daniel Mack --- Changes from v2: - also add pxa27x.dtsi - enable marvell,intc-priority for pxa3xx and pxa27x. arch/arm/boot/dts/pxa27x.dtsi | 13 +++++ arch/arm/boot/dts/pxa2xx.dtsi | 132 ++++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/pxa3xx.dtsi | 31 ++++++++++ 3 files changed, 176 insertions(+) create mode 100644 arch/arm/boot/dts/pxa27x.dtsi create mode 100644 arch/arm/boot/dts/pxa2xx.dtsi create mode 100644 arch/arm/boot/dts/pxa3xx.dtsi diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi new file mode 100644 index 0000000..043aa65 --- /dev/null +++ b/arch/arm/boot/dts/pxa27x.dtsi @@ -0,0 +1,13 @@ +/* The pxa3xx skeleton simply augments the 2xx version */ +/include/ "pxa2xx.dtsi" + +/ { + model = "Marvell PXA27x familiy SoC"; + compatible = "marvell,pxa27x"; + + pxabus { + pxairq: interrupt-controller@40d00000 { + marvell,intc-priority; + }; + }; +}; diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi new file mode 100644 index 0000000..4fe3b91 --- /dev/null +++ b/arch/arm/boot/dts/pxa2xx.dtsi @@ -0,0 +1,132 @@ +/* + * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC + * + * Copyright (C) 2011 Marek Vasut + * + * Licensed under GPLv2 or later. + */ + +/include/ "skeleton.dtsi" + +/ { + model = "Marvell PXA2xx family SoC"; + compatible = "marvell,pxa2xx"; + interrupt-parent = <&pxairq>; + + aliases { + serial0 = &ffuart; + serial1 = &btuart; + serial2 = &stuart; + serial3 = &hwuart; + i2c0 = &pwri2c; + i2c1 = &pxai2c1; + }; + + cpus { + cpu@0 { + compatible = "arm,xscale"; + }; + }; + + pxabus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pxairq: interrupt-controller@40d00000 { + #interrupt-cells = <1>; + compatible = "marvell,pxa-intc"; + interrupt-controller; + interrupt-parent; + mrvl,intc-nr-irqs = <56>; + reg = <0x40d00000 0xd0>; + }; + + gpio: gpio@40e00000 { + compatible = "mrvl,pxa-gpio"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x40e00000 0x10000>; + gpio-controller; + #gpio-cells = <0x2>; + interrupts = <10>; + interrupt-names = "gpio_mux"; + interrupt-controller; + #interrupt-cells = <0x2>; + ranges; + + gcb0: gpio@40e00000 { + reg = <0x40e00000 0x4>; + }; + + gcb1: gpio@40e00004 { + reg = <0x40e00004 0x4>; + }; + + gcb2: gpio@40e00008 { + reg = <0x40e00008 0x4>; + }; + gcb3: gpio@40e0000c { + reg = <0x40e0000c 0x4>; + }; + }; + + ffuart: uart@40100000 { + compatible = "mrvl,pxa-uart"; + reg = <0x40100000 0x30>; + interrupts = <22>; + status = "disabled"; + }; + + btuart: uart@40200000 { + compatible = "mrvl,pxa-uart"; + reg = <0x40200000 0x30>; + interrupts = <21>; + status = "disabled"; + }; + + stuart: uart@40700000 { + compatible = "mrvl,pxa-uart"; + reg = <0x40700000 0x30>; + interrupts = <20>; + status = "disabled"; + }; + + hwuart: uart@41100000 { + compatible = "mrvl,pxa-uart"; + reg = <0x41100000 0x30>; + interrupts = <7>; + status = "disabled"; + }; + + pxai2c1: i2c@40301680 { + compatible = "mrvl,pxa-i2c"; + reg = <0x40301680 0x30>; + interrupts = <18>; + #address-cells = <0x1>; + #size-cells = <0>; + status = "disabled"; + }; + + usb0: ohci@4c000000 { + compatible = "mrvl,pxa-ohci"; + reg = <0x4c000000 0x10000>; + interrupts = <3>; + status = "disabled"; + }; + + mmc0: mmc@41100000 { + compatible = "mrvl,pxa-mmc"; + reg = <0x41100000 0x1000>; + interrupts = <23>; + status = "disabled"; + }; + + rtc@40900000 { + compatible = "marvell,pxa-rtc"; + reg = <0x40900000 0x3c>; + interrupts = <30 31>; + }; + }; +}; diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi new file mode 100644 index 0000000..7a55290 --- /dev/null +++ b/arch/arm/boot/dts/pxa3xx.dtsi @@ -0,0 +1,31 @@ +/* The pxa3xx skeleton simply augments the 2xx version */ +/include/ "pxa2xx.dtsi" + +/ { + model = "Marvell PXA3xx familiy SoC"; + compatible = "marvell,pxa3xx"; + + pxabus { + pwri2c: i2c@40f500c0 { + compatible = "mrvl,pwri2c"; + reg = <0x40f500c0 0x30>; + interrupts = <6>; + #address-cells = <0x1>; + #size-cells = <0>; + status = "disabled"; + }; + + nand0: nand@43100000 { + compatible = "marvell,pxa3xx-nand"; + reg = <0x43100000 90>; + interrupts = <45>; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + }; + + pxairq: interrupt-controller@40d00000 { + marvell,intc-priority; + }; + }; +}; -- 1.7.11.2