From patchwork Wed Oct 24 10:58:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shinya Kuribayashi X-Patchwork-Id: 1637561 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 1D7D23FD4E for ; Wed, 24 Oct 2012 11:00:07 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQyfB-00057C-TF; Wed, 24 Oct 2012 10:58:18 +0000 Received: from relmlor2.renesas.com ([210.160.252.172]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQyf5-00054J-Vz for linux-arm-kernel@lists.infradead.org; Wed, 24 Oct 2012 10:58:12 +0000 Received: from relmlir3.idc.renesas.com ([10.200.68.153]) by relmlor2.idc.renesas.com ( SJSMS) with ESMTP id <0MCE006NL94Z0T10@relmlor2.idc.renesas.com> for linux-arm-kernel@lists.infradead.org; Wed, 24 Oct 2012 19:58:11 +0900 (JST) Received: from relmlac4.idc.renesas.com ([10.200.69.24]) by relmlir3.idc.renesas.com ( SJSMS) with ESMTP id <0MCE00B2F94Z4DD0@relmlir3.idc.renesas.com> for linux-arm-kernel@lists.infradead.org; Wed, 24 Oct 2012 19:58:11 +0900 (JST) Received: by relmlac4.idc.renesas.com (Postfix, from userid 0) id EEEA5480A5; Wed, 24 Oct 2012 19:58:10 +0900 (JST) Received: from relmlac4.idc.renesas.com (localhost [127.0.0.1]) by relmlac4.idc.renesas.com (Postfix) with ESMTP id E7FB3480A4; Wed, 24 Oct 2012 19:58:10 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac4.idc.renesas.com with ESMTP id VAA30964; Wed, 24 Oct 2012 19:58:10 +0900 X-IronPort-AV: E=Sophos; i="4.80,639,1344178800"; d="scan'208"; a="103457204" Received: from unknown (HELO [10.161.64.55]) ([10.161.64.55]) by relmlii2.idc.renesas.com with ESMTP; Wed, 24 Oct 2012 19:58:10 +0900 Message-id: <5087C9C2.7010000@renesas.com> Date: Wed, 24 Oct 2012 19:58:10 +0900 From: Shinya Kuribayashi User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:16.0) Gecko/20121010 Thunderbird/16.0.1 MIME-version: 1.0 To: w.sang@pengutronix.de, ben-linux@fluff.org, magnus.damm@gmail.com Subject: [PATCH 4/5] i2c: i2c-sh_mobile: support I2C hardware block with a faster operating clock References: <5087C93F.6080601@renesas.com> In-reply-to: <5087C93F.6080601@renesas.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sh@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On newer SH-/R-Mobile SoCs, a clock supply to the I2C hardware block, which is used to generate the SCL clock output, is getting faster than before, while on the other hand, the SCL clock control registers, ICCH and ICCL, stay unchanged in 9-bit-wide (8+1). On such silicons, the internal SCL clock counter gets incremented every 2 clocks of the operating clock. This patch makes it configurable through platform data. Signed-off-by: Shinya Kuribayashi --- drivers/i2c/busses/i2c-sh_mobile.c | 5 +++++ include/linux/i2c/i2c-sh_mobile.h | 1 + 2 files changed, 6 insertions(+) diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c index 4dc0cc3..4c28358 100644 --- a/drivers/i2c/busses/i2c-sh_mobile.c +++ b/drivers/i2c/busses/i2c-sh_mobile.c @@ -120,6 +120,7 @@ struct sh_mobile_i2c_data { void __iomem *reg; struct i2c_adapter adap; unsigned long bus_speed; + unsigned int clks_per_count; struct clk *clk; u_int8_t icic; u_int8_t flags; @@ -231,6 +232,7 @@ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd) /* Get clock rate after clock is enabled */ clk_enable(pd->clk); i2c_clk_khz = clk_get_rate(pd->clk) / 1000; + i2c_clk_khz /= pd->clks_per_count; if (pd->bus_speed == STANDARD_MODE) { tLOW = 47; /* tLOW = 4.7 us */ @@ -658,6 +660,9 @@ static int sh_mobile_i2c_probe(struct platform_device *dev) pd->bus_speed = STANDARD_MODE; if (pdata && pdata->bus_speed) pd->bus_speed = pdata->bus_speed; + pd->clks_per_count = 1; + if (pdata && pdata->clks_per_count) + pd->clks_per_count = pdata->clks_per_count; /* The IIC blocks on SH-Mobile ARM processors * come with two new bits in ICIC. diff --git a/include/linux/i2c/i2c-sh_mobile.h b/include/linux/i2c/i2c-sh_mobile.h index beda708..06e3089 100644 --- a/include/linux/i2c/i2c-sh_mobile.h +++ b/include/linux/i2c/i2c-sh_mobile.h @@ -5,6 +5,7 @@ struct i2c_sh_mobile_platform_data { unsigned long bus_speed; + unsigned int clks_per_count; }; #endif /* __I2C_SH_MOBILE_H__ */