From patchwork Thu Nov 8 22:45:45 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanislav Meduna X-Patchwork-Id: 1718191 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 61DC2DF280 for ; Thu, 8 Nov 2012 22:48:22 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TWarU-0005rz-S9; Thu, 08 Nov 2012 22:46:12 +0000 Received: from www.meduna.org ([92.240.244.38] helo=meduna.org) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TWarQ-0005ra-Ik for linux-arm-kernel@lists.infradead.org; Thu, 08 Nov 2012 22:46:09 +0000 Received: from dial-95-105-165-4-orange.orange.sk ([95.105.165.4] helo=[192.168.130.22]) by meduna.org with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.72) (envelope-from ) id 1TWar8-0005TU-2W; Thu, 08 Nov 2012 23:45:57 +0100 Message-ID: <509C3619.30701@meduna.org> Date: Thu, 08 Nov 2012 23:45:45 +0100 From: Stanislav Meduna User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:16.0) Gecko/20121026 Thunderbird/16.0.2 MIME-Version: 1.0 To: Shawn Guo Subject: [PATCH] ARM: mxs: Setup scheduler clock References: <50919AFF.3060602@meduna.org> <5093D8DE.70505@meduna.org> <20121105025753.GA26528@S2100-06.ap.freescale.net> <50978370.9060001@meduna.org> <20121105134655.GB27260@S2100-06.ap.freescale.net> <5097E4A9.3090008@meduna.org> <20121105222859.GI28327@n2100.arm.linux.org.uk> <5098CB9F.9030401@meduna.org> <20121106134630.GD27643@S2100-06.ap.freescale.net> In-Reply-To: <20121106134630.GD27643@S2100-06.ap.freescale.net> X-Enigmail-Version: 1.4.5 X-Authenticated-User: stano@meduna.org X-Authenticator: dovecot_plain X-Spam-Score: -6.9 X-Spam-Score-Int: -68 X-Exim-Version: 4.72 (build at 12-May-2011 18:13:45) X-Date: 2012-11-08 23:45:57 X-Connected-IP: 95.105.165.4:58308 X-Message-Linecount: 96 X-Body-Linecount: 81 X-Message-Size: 3283 X-Body-Size: 2326 X-Received-Count: 1 X-Recipient-Count: 3 X-Local-Recipient-Count: 3 X-Local-Recipient-Defer-Count: 0 X-Local-Recipient-Fail-Count: 0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121108_174608_789663_96B9E2A9 X-CRM114-Status: GOOD ( 17.09 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: "linux-rt-users@vger.kernel.org" , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi, OK, as the problem with 16-bit fast ticking timer looks to be more complicated, I'd like to submit the patch for the 32-bit ones. Thanks diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index 564a632..4b6e36c 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c @@ -26,6 +26,7 @@ #include #include +#include #include #include @@ -230,15 +231,22 @@ static struct clocksource clocksource_mxs = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; +static u32 notrace mxs_read_sched_clock_v2(void) +{ + return ~readl_relaxed(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1)); +} + static int __init mxs_clocksource_init(struct clk *timer_clk) { unsigned int c = clk_get_rate(timer_clk); if (timrot_is_v1()) clocksource_register_hz(&clocksource_mxs, c); - else + else { clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1), "mxs_timer", c, 200, 32, clocksource_mmio_readl_down); + setup_sched_clock(mxs_read_sched_clock_v2, 32, c); + } return 0; }