From patchwork Thu Mar 28 07:32:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 2355051 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 0C390DF2A1 for ; Thu, 28 Mar 2013 07:33:41 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UL7Ib-0006J6-LL; Thu, 28 Mar 2013 07:31:01 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UL7IZ-0006Ic-Gn for linux-arm-kernel@lists.infradead.org; Thu, 28 Mar 2013 07:31:00 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r2S7UtYM003706; Thu, 28 Mar 2013 02:30:56 -0500 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2S7UsJc023395; Thu, 28 Mar 2013 13:00:54 +0530 (IST) Received: from dbdp33.itg.ti.com (172.24.170.252) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Thu, 28 Mar 2013 13:00:54 +0530 Received: from [172.24.136.207] (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp33.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2S7UrZb019754; Thu, 28 Mar 2013 13:00:53 +0530 Message-ID: <5153F226.8060604@ti.com> Date: Thu, 28 Mar 2013 13:02:54 +0530 From: Santosh Shilimkar User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/17.0 Thunderbird/17.0 MIME-Version: 1.0 To: Subject: Re: [PATCH 1/9] ARM: OMAP4+: Use common scratchpad SAR RAM offsets for all architectures References: <1361373527-21695-1-git-send-email-santosh.shilimkar@ti.com> <1361373527-21695-2-git-send-email-santosh.shilimkar@ti.com> <87mwto7ki5.fsf@linaro.org> <51535B66.60307@ti.com> <20130327204930.GM10155@atomide.com> <51535C23.5000405@ti.com> In-Reply-To: <51535C23.5000405@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130328_033059_649259_A2916640 X-CRM114-Status: GOOD ( 16.93 ) X-Spam-Score: -8.2 (--------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-8.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.3 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Tony Lindgren , Tero Kristo , Kevin Hilman , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On Thursday 28 March 2013 02:22 AM, Santosh Shilimkar wrote: > On Thursday 28 March 2013 02:19 AM, Tony Lindgren wrote: >> * Santosh Shilimkar [130327 13:52]: >>> On Thursday 28 March 2013 12:11 AM, Kevin Hilman wrote: >>>> Santosh Shilimkar writes: >>>> >>>>> From: Tero Kristo >>>>> >>>>> Simplifies code and also allows the re-use as is on OMAP5 devices. >>>> >>>> nit: changelog here is rather weak. It claims "simplifies code" but >>>> it's not obvious from the patch how changing a few #defines does that. >>>> >>> I agree. Basically the offset are chosen such a way that they can >>> work on OMAP4 and OMAP5 instead of having two separate sets. >>> Will expand the changelog to make it clear. >> >> You might want to mention also that the offsets are only used by >> the kernel to save and restore registers from so people don't >> think those are hardare registers and that the patch might break >> some things. >> > Yeah. Will mention that. > For record, patch with updated changelog end of email. Regards, Santosh From f98d5fe8079cc4830e4ce22585055822119da5c8 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 6 Feb 2013 18:39:20 +0530 Subject: [PATCH v2 1/9] ARM: OMAP4+: Use common scratchpad SAR RAM offsets for all architectures Choose the common scratch pad offsets, so that same offsets can work for OMAP4 and OMAP5 devices. It simplifies code and also allows the re-use as is on OMAP5 devices. Note that these offsets are used by low power code for various power state management. They are not hardware register offsets. Signed-off-by: Tero Kristo Signed-off-by: Santosh Shilimkar --- arch/arm/mach-omap2/omap4-sar-layout.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h index e170fe8..6822d0a 100644 --- a/arch/arm/mach-omap2/omap4-sar-layout.h +++ b/arch/arm/mach-omap2/omap4-sar-layout.h @@ -20,13 +20,13 @@ #define SAR_BANK4_OFFSET 0x3000 /* Scratch pad memory offsets from SAR_BANK1 */ -#define SCU_OFFSET0 0xd00 -#define SCU_OFFSET1 0xd04 -#define OMAP_TYPE_OFFSET 0xd10 -#define L2X0_SAVE_OFFSET0 0xd14 -#define L2X0_SAVE_OFFSET1 0xd18 -#define L2X0_AUXCTRL_OFFSET 0xd1c -#define L2X0_PREFETCH_CTRL_OFFSET 0xd20 +#define SCU_OFFSET0 0xfe4 +#define SCU_OFFSET1 0xfe8 +#define OMAP_TYPE_OFFSET 0xfec +#define L2X0_SAVE_OFFSET0 0xff0 +#define L2X0_SAVE_OFFSET1 0xff4 +#define L2X0_AUXCTRL_OFFSET 0xff8 +#define L2X0_PREFETCH_CTRL_OFFSET 0xffc /* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */ #define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04