From patchwork Wed Aug 7 06:33:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 2839919 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id F067B9F479 for ; Wed, 7 Aug 2013 06:34:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1AE422004F for ; Wed, 7 Aug 2013 06:34:27 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5204720189 for ; Wed, 7 Aug 2013 06:34:25 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V6xKA-0003Qv-Uk; Wed, 07 Aug 2013 06:34:23 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V6xK8-0005It-NI; Wed, 07 Aug 2013 06:34:20 +0000 Received: from 7.mo3.mail-out.ovh.net ([46.105.57.200] helo=mo3.mail-out.ovh.net) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V6xK4-0005IZ-Ln for linux-arm-kernel@lists.infradead.org; Wed, 07 Aug 2013 06:34:18 +0000 Received: from mail432.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo3.mail-out.ovh.net (Postfix) with SMTP id 84481FF93E4 for ; Wed, 7 Aug 2013 08:33:52 +0200 (CEST) Received: from b0.ovh.net (HELO queueout) (213.186.33.50) by b0.ovh.net with SMTP; 7 Aug 2013 08:34:46 +0200 Received: from cha74-5-78-236-240-82.fbx.proxad.net (HELO ?192.168.0.14?) (b.brezillon@overkiz.com@78.236.240.82) by ns0.ovh.net with SMTP; 7 Aug 2013 08:34:44 +0200 Message-ID: <5201EA4D.8030106@overkiz.com> Date: Wed, 07 Aug 2013 08:33:49 +0200 From: boris brezillon User-Agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: dgilbert@interlog.com X-Ovh-Mailout: 178.32.228.3 (mo3.mail-out.ovh.net) Subject: Re: at91sam9x5: uart (not usart) broken References: <52019591.2010408@interlog.com> In-Reply-To: <52019591.2010408@interlog.com> X-Ovh-Tracer-Id: 16898631703759190271 X-Ovh-Remote: 78.236.240.82 (cha74-5-78-236-240-82.fbx.proxad.net) X-Ovh-Local: 213.186.33.20 (ns0.ovh.net) X-OVH-SPAMSTATE: OK X-OVH-SPAMSCORE: -100 X-OVH-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeikedrtddvucetufdoteggodetrfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-Spam-Check: DONE|U 0.5/N X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeikedrtddvucetufdoteggodetrfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130807_023416_889487_B14B96A2 X-CRM114-Status: GOOD ( 24.00 ) X-Spam-Score: -1.9 (-) Cc: "Ferre, Nicolas" , linux-arm-kernel , Robert Nelson X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hello Doug, On 07/08/2013 02:32, Douglas Gilbert wrote: > Between lk 3.10.0 and lk 3.11.0-rc4 the uarts (not usarts) > have been broken in the at91sam9x5 family. The DT files have > been re-factored for uarts but look correct. > > So suspicion moves to the atmel_serial driver which enjoyed > a lot of changes in June. > My patch (the last one in log history) is adding error checks on clk_get and clk_enable (clk_prepare_enable) calls. I think the issue you're having comes from these new checks, and the fact that uart clks DT entries are missing. The previous version was just silently ignoring these errors. It may work if these clks (uart clks) are already enabled by bootstrap or bootloader. Anyway, I think the cleaner way for resolving this issue is to apply the patch I joined in attachment. Could you test it (I don't have any sam9x5 boards), and if this works I'll submit it. Best Regards, Boris > Tested on a at91sam9g25 (Aria G25) which is a member of the > at91sam9x5 family with two uarts (four usarts and a debug > serial port). The failure looks like this in dmesg: > > console [ttyS0] enabled > f801c000.serial: ttyS1 at MMIO 0xf801c000 (irq = 23) is a ATMEL_SERIAL > f8020000.serial: ttyS2 at MMIO 0xf8020000 (irq = 24) is a ATMEL_SERIAL > f8024000.serial: ttyS3 at MMIO 0xf8024000 (irq = 25) is a ATMEL_SERIAL > atmel_usart: probe of f8040000.serial failed with error -2 > f8028000.serial: ttyS4 at MMIO 0xf8028000 (irq = 32) is a ATMEL_SERIAL > > The device at 0xf8040000 is uart0 . My DT file was trying > to bring up uart0 but not uart1. > > Doug Gilbert From f8e4996c7e3d99d9b4c76fc579b1aa66e71f08bf Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Wed, 7 Aug 2013 08:16:15 +0200 Subject: [PATCH] ARM: at91: add missing uart clocks DT entries Add clocks to clock lookup table for uart DT entries. Signed-off-by: Boris BREZILLON --- arch/arm/mach-at91/at91sam9x5.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 2abee66..916e5a1 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -227,6 +227,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk), CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk), CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk), + CLKDEV_CON_DEV_ID("usart", "f8040000.serial", &uart0_clk), + CLKDEV_CON_DEV_ID("usart", "f8044000.serial", &uart1_clk), CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk), CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk), CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk), -- 1.7.9.5