From patchwork Fri Oct 11 00:15:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 3019571 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id F070CBF924 for ; Fri, 11 Oct 2013 00:16:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 070D22022A for ; Fri, 11 Oct 2013 00:16:03 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EA5A120221 for ; Fri, 11 Oct 2013 00:16:01 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VUQOc-0005nm-1e; Fri, 11 Oct 2013 00:15:58 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VUQOZ-0000JM-HV; Fri, 11 Oct 2013 00:15:55 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VUQOW-0000Iz-HM for linux-arm-kernel@lists.infradead.org; Fri, 11 Oct 2013 00:15:53 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r9B0FNc9023794; Thu, 10 Oct 2013 19:15:23 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9B0FNlx023050; Thu, 10 Oct 2013 19:15:23 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Thu, 10 Oct 2013 19:15:23 -0500 Received: from [158.218.103.117] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9B0FM9W016006; Thu, 10 Oct 2013 19:15:23 -0500 Message-ID: <5257431A.5090301@ti.com> Date: Thu, 10 Oct 2013 20:15:22 -0400 From: Santosh Shilimkar User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/17.0 Thunderbird/17.0 MIME-Version: 1.0 To: Subject: Re: [PATCH v2 4/4] ARM: keystone: add PM bus support for clock management References: <1377819404-9671-1-git-send-email-santosh.shilimkar@ti.com> <1377819404-9671-5-git-send-email-santosh.shilimkar@ti.com> In-Reply-To: <1377819404-9671-5-git-send-email-santosh.shilimkar@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131010_201552_696973_43CD3B1C X-CRM114-Status: GOOD ( 21.40 ) X-Spam-Score: -7.1 (-------) Cc: arm@kernel.org, Santosh Shilimkar , khilman@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thursday 29 August 2013 07:36 PM, Santosh Shilimkar wrote: > Add runtime PM core support to Keystone SOCs by using the pm_clk > infrastructure of the PM core. Patch is based on Kevin's pm_domain > work on DaVinci SOCs. > > Keystone SOC doesn't have depedency to enable clocks in early > in the boot and hence the clock and PM bus initialisation is done > at subsys_init() level. > > Cc: Kevin Hilman > > Signed-off-by: Santosh Shilimkar > --- For record, updated patch end of the email as discussed here [1] Regards, Santosh [1] http://www.spinics.net/lists/arm-kernel/msg278991.html From fc20ffe1213beb09bb7fb6687b404fe48183a55e Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sun, 14 Jul 2013 17:17:39 -0400 Subject: [PATCH 4/4] ARM: keystone: add PM domain support for clock management Add runtime PM core support to Keystone SOCs by using the pm_clk infrastructure of the PM core. Patch is based on Kevin's pm_domain work on DaVinci SOCs. Keystone SOC doesn't have dependency to enable clocks in early in the boot and hence the clock and PM domain initialisation is done at subsys_init() level. Cc: Kevin Hilman Signed-off-by: Santosh Shilimkar --- arch/arm/mach-keystone/Makefile | 3 ++ arch/arm/mach-keystone/pm_domain.c | 70 ++++++++++++++++++++++++++++++++++++ 2 files changed, 73 insertions(+) create mode 100644 arch/arm/mach-keystone/pm_domain.c diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile index ddc52b0..25d9239 100644 --- a/arch/arm/mach-keystone/Makefile +++ b/arch/arm/mach-keystone/Makefile @@ -4,3 +4,6 @@ plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec) obj-$(CONFIG_SMP) += platsmp.o + +# PM domain driver for Keystone SOCs +obj-$(CONFIG_ARCH_KEYSTONE) += pm_domain.o diff --git a/arch/arm/mach-keystone/pm_domain.c b/arch/arm/mach-keystone/pm_domain.c new file mode 100644 index 0000000..beac3fb --- /dev/null +++ b/arch/arm/mach-keystone/pm_domain.c @@ -0,0 +1,70 @@ +/* + * PM domain driver for Keystone2 devices + * + * Copyright 2013 Texas Instruments, Inc. + * Santosh Shilimkar + * + * Based on Kevins work on DAVINCI SOCs + * Kevin Hilman + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#ifdef CONFIG_PM_RUNTIME +static int keystone_pm_runtime_suspend(struct device *dev) +{ + int ret; + + dev_dbg(dev, "%s\n", __func__); + + ret = pm_generic_runtime_suspend(dev); + if (ret) + return ret; + + ret = pm_clk_suspend(dev); + if (ret) { + pm_generic_runtime_resume(dev); + return ret; + } + + return 0; +} + +static int keystone_pm_runtime_resume(struct device *dev) +{ + dev_dbg(dev, "%s\n", __func__); + + pm_clk_resume(dev); + + return pm_generic_runtime_resume(dev); +} +#endif + +static struct dev_pm_domain keystone_pm_domain = { + .ops = { + SET_RUNTIME_PM_OPS(keystone_pm_runtime_suspend, + keystone_pm_runtime_resume, NULL) + USE_PLATFORM_PM_SLEEP_OPS + }, +}; + +static struct pm_clk_notifier_block platform_domain_notifier = { + .pm_domain = &keystone_pm_domain, +}; + +int __init keystone_pm_runtime_init(void) +{ + of_clk_init(NULL); + pm_clk_add_notifier(&platform_bus_type, &platform_domain_notifier); + + return 0; +} +subsys_initcall(keystone_pm_runtime_init);