From patchwork Thu Oct 17 09:24:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 3059711 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 89B98BF924 for ; Thu, 17 Oct 2013 09:27:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5FBAA2030E for ; Thu, 17 Oct 2013 09:27:02 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6A7F52030B for ; Thu, 17 Oct 2013 09:26:57 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VWjqS-0008IB-1z; Thu, 17 Oct 2013 09:26:16 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VWjqD-00066y-12; Thu, 17 Oct 2013 09:26:01 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VWjpz-00063b-6I for linux-arm-kernel@lists.infradead.org; Thu, 17 Oct 2013 09:25:47 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r9H9PNJe023953; Thu, 17 Oct 2013 04:25:23 -0500 Received: from DNCE70.ent.ti.com (dnce70.ent.ti.com [137.167.131.19]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9H9PM3V022373; Thu, 17 Oct 2013 04:25:23 -0500 Received: from [10.167.145.172] (10.167.145.172) by DNCE70.ent.ti.com (137.167.131.19) with Microsoft SMTP Server id 14.2.342.3; Thu, 17 Oct 2013 11:25:22 +0200 Message-ID: <525FACB7.9000903@ti.com> Date: Thu, 17 Oct 2013 12:24:07 +0300 From: Grygorii Strashko User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.0 MIME-Version: 1.0 To: "linux-omap@vger.kernel.org" , Tony Lindgren Subject: [PATCH 1/2] Revert "ARM: OMAP4+: CPUidle: Deprecate use of omap4_mpuss_read_prev_context_state()" References: <1382000776-15897-2-git-send-email-grygorii.strashko@ti.com> In-Reply-To: <1382000776-15897-2-git-send-email-grygorii.strashko@ti.com> X-Forwarded-Message-Id: <1382000776-15897-2-git-send-email-grygorii.strashko@ti.com> X-Originating-IP: [10.167.145.172] X-EXCLAIMER-MD-CONFIG: f9c360f5-3d1e-4c3c-8703-f45bf52eff6b X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131017_052547_329756_B99D15F3 X-CRM114-Status: GOOD ( 11.03 ) X-Spam-Score: -7.3 (-------) Cc: Taras Kondratiuk , Kevin Hilman , Santosh Shilimkar , open list , linux-arm X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The same workaround as ff999b8a0983ee15668394ed49e38d3568fc6859 "ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC control register change." need to be applied not only when system is booting, but when MPU hits OSWR state through CPUIdle too. Unfortunately, commit "ARM: OMAP4+: CPUidle: Deprecate use of omap4_mpuss_read_prev_context_state()" prevents us from implementing workaround for this ROM code bug, because it should be applied only (and only) when MPU really hits OSWR and its was lost context. Hence revert commit e7457253494fff660a72bc0cedeee97491ccd173 "ARM: OMAP4+: CPUidle: Deprecate use of omap4_mpuss_read_prev_context_state()". Cc: Santosh Shilimkar Cc: Kevin Hilman Reported-and-Tested-by: Taras Kondratiuk Signed-off-by: Grygorii Strashko --- arch/arm/mach-omap2/common.h | 5 +++++ arch/arm/mach-omap2/cpuidle44xx.c | 3 +-- arch/arm/mach-omap2/omap-mpuss-lowpower.c | 14 ++++++++++++++ 3 files changed, 20 insertions(+), 2 deletions(-) */ diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 4a5684b..b875a4a 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -259,6 +259,7 @@ extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); extern int omap4_finish_suspend(unsigned long cpu_state); extern void omap4_cpu_resume(void); extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); +extern u32 omap4_mpuss_read_prev_context_state(void); #else static inline int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) @@ -286,6 +287,10 @@ static inline int omap4_finish_suspend(unsigned long cpu_state) static inline void omap4_cpu_resume(void) {} +static inline u32 omap4_mpuss_read_prev_context_state(void) +{ + return 0; +} #endif struct omap_sdrc_params; diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 4c8982a..384aa1c 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -143,8 +143,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, * Call idle CPU cluster PM exit notifier chain * to restore GIC and wakeupgen context. */ - if (dev->cpu == 0 && (cx->mpu_state == PWRDM_POWER_RET) && - (cx->mpu_logic_state == PWRDM_POWER_OFF)) + if (dev->cpu == 0 && omap4_mpuss_read_prev_context_state()) cpu_cluster_pm_exit(); fail: diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index f991016..178caa8 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -172,6 +172,20 @@ static inline void cpu_clear_prev_logic_pwrst(unsigned int cpu_id) } } +/** + * omap4_mpuss_read_prev_context_state: + * Function returns the MPUSS previous context state + */ +u32 omap4_mpuss_read_prev_context_state(void) +{ + u32 reg; + + reg = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, + OMAP4430_PRM_MPU_INST, OMAP4_RM_MPU_MPU_CONTEXT_OFFSET); + reg &= OMAP4430_LOSTCONTEXT_DFF_MASK; + return reg; +} + /* * Store the CPU cluster state for L2X0 low power operations.