From patchwork Sat Dec 7 16:05:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matthias Mann X-Patchwork-Id: 3305101 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6D365C0D4A for ; Sat, 7 Dec 2013 16:05:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AD0AC202A7 for ; Sat, 7 Dec 2013 16:05:41 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 648BD20200 for ; Sat, 7 Dec 2013 16:05:40 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VpKNo-00006P-3Y; Sat, 07 Dec 2013 16:05:32 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VpKNi-0000J0-Ke; Sat, 07 Dec 2013 16:05:26 +0000 Received: from smtp-out002.kontent.com ([81.88.40.216]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VpKNg-0000Ic-Dl for linux-arm-kernel@lists.infradead.org; Sat, 07 Dec 2013 16:05:25 +0000 Received: from [192.168.2.100] (p4FF0D907.dip0.t-ipconnect.de [79.240.217.7]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: arkona-technologies_de_11@smtp-out002.kontent.com) by smtp-out002.kontent.com (Postfix) with ESMTPSA id C323510037249; Sat, 7 Dec 2013 17:04:58 +0100 (CET) Message-ID: <52A3472C.4010203@arkona-technologies.de> Date: Sat, 07 Dec 2013 17:05:00 +0100 From: Matthias Mann User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Firefox/24.0 SeaMonkey/2.21 MIME-Version: 1.0 To: Russell King Subject: [PATCH v2] ARM: asm: add readq/writeq methods X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131207_110524_615403_B3D160C4 X-CRM114-Status: GOOD ( 11.11 ) X-Spam-Score: -2.6 (--) Cc: mans@mansr.com, shc_work@mail.ru, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add readq/writeq methods for 32 bit ARM to allow transfering 64 bit words over PCIe as a single transfer. Signed-off-by: Matthias Mann --- v2: Changed assembler according to comments from Måns Rullgård Check for ARM architecture support and added preprocessor guards as requested by Russel King --- arch/arm/include/asm/io.h | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 3c597c2..89d4ecd 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -112,6 +112,36 @@ static inline u32 __raw_readl(const volatile void __iomem *addr) return val; } +#if __LINUX_ARM_ARCH__ >= 5 +static inline u64 __raw_readq(const volatile void __iomem *addr) +{ + u64 val; +#if __LITTLE_ENDIAN + asm volatile("ldrd %Q1, %R1, %0" + : "+Q" (*(volatile u64 __force *)addr), + "=r" (val)); +#else + asm volatile("ldrd %R1, %Q1, %0" + : "+Q" (*(volatile u64 __force *)addr), + "=r" (val)); +#endif + return val; +} + +static inline void __raw_writeq(u64 val, volatile void __iomem *addr) +{ +#if __LITTLE_ENDIAN + asm volatile("strd %Q1, %R1, %0" + : "+Q" (*(volatile u64 __force *)addr) + : "r" (val)); +#else + asm volatile("strd %R1, %Q1, %0" + : "+Q" (*(volatile u64 __force *)addr) + : "r" (val)); +#endif +} +#endif /* __LINUX_ARM_ARCH__ >= 5 */ + /* * Architecture ioremap implementation. */ @@ -320,6 +350,23 @@ extern void _memset_io(volatile void __iomem *, int, size_t); #endif /* readl */ +#if __LINUX_ARM_ARCH__ >= 5 + +#ifndef readq +#define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64) \ + __raw_readq(c)); __r; }) + +#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; }) +#endif /* readq */ + +#ifndef writeq +#define writeq_relaxed(v,c) __raw_writeq((__force u64) cpu_to_le64(v),c) + +#define writeq(v,c) ({ __iowmb(); writeq_relaxed(v,c); }) +#endif /* writeq */ + +#endif /* __LINUX_ARM_ARCH__ >= 5 */ + /* * ioremap and friends. *